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Results 41 - 50 of 57 for r26 (0.02 sec)
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src/crypto/internal/nistec/p256_asm_ppc64le.s
MOVD $128, R23 MOVD $144, R24 MOVD $160, R25 MOVD $104, R26 // offset of sign+24(FP) LXVD2X (R16)(CPOOL), PH LXVD2X (R0)(CPOOL), PL LXVD2X (R17)(P2ptr), Y2L LXVD2X (R18)(P2ptr), Y2H XXPERMDI Y2H, Y2H, $2, Y2H XXPERMDI Y2L, Y2L, $2, Y2L // Equivalent of VLREPG sign+24(FP), SEL1 LXVDSX (R1)(R26), SEL1 VSPLTISB $0, ZER VCMPEQUD SEL1, ZER, SEL1
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 56.5K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 21 19:04:19 UTC 2023 - 25.2K bytes - Viewed (0) -
src/crypto/sha512/sha512block_ppc64x.s
#define END R5 #define TBL R6 #define CNT R8 #define LEN R9 #define TEMP R12 #define TBL_STRT R7 // Pointer to start of kcon table. #define R_x000 R0 #define R_x010 R10 #define R_x020 R25 #define R_x030 R26 #define R_x040 R14 #define R_x050 R15 #define R_x060 R16 #define R_x070 R17 #define R_x080 R18 #define R_x090 R19 #define R_x0a0 R20 #define R_x0b0 R21 #define R_x0c0 R22 #define R_x0d0 R23
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 15.8K bytes - Viewed (0) -
platforms/ide/tooling-api/src/crossVersionTest/groovy/org/gradle/integtests/tooling/r26/TestLauncherCrossVersionSpec.groovy
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. */ package org.gradle.integtests.tooling.r26 import groovy.transform.stc.ClosureParams import groovy.transform.stc.SimpleType import org.gradle.api.GradleException import org.gradle.integtests.tooling.TestLauncherSpec
Registered: Wed Jun 12 18:38:38 UTC 2024 - Last Modified: Wed Mar 06 06:59:43 UTC 2024 - 22.6K bytes - Viewed (0) -
src/runtime/asm_loong64.s
MOVV R16, 120(R3) MOVV R17, 128(R3) MOVV R18, 136(R3) // R19 already saved MOVV R20, 144(R3) MOVV R21, 152(R3) // R22 is g. MOVV R23, 160(R3) MOVV R24, 168(R3) MOVV R25, 176(R3) MOVV R26, 184(R3) // R27 already saved // R28 already saved. MOVV R29, 192(R3) // R30 is tmp register. MOVV R31, 200(R3) CALL runtime·wbBufFlush(SB) MOVV 8(R3), R27 MOVV 16(R3), R28
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 13 15:04:25 UTC 2024 - 26.5K bytes - Viewed (0) -
src/crypto/sha256/sha256block_ppc64x.s
#define R_x060 R16 #define R_x070 R17 #define R_x080 R18 #define R_x090 R19 #define R_x0a0 R20 #define R_x0b0 R21 #define R_x0c0 R22 #define R_x0d0 R23 #define R_x0e0 R24 #define R_x0f0 R25 #define R_x100 R26 #define R_x110 R27 // V0-V7 are A-H // V8-V23 are used for the message schedule #define KI V24 #define FUNC V25 #define S0 V26 #define S1 V27 #define s0 V28 #define s1 V29
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 14.4K bytes - Viewed (0) -
src/cmd/internal/notsha256/sha256block_ppc64x.s
#define R_x060 R16 #define R_x070 R17 #define R_x080 R18 #define R_x090 R19 #define R_x0a0 R20 #define R_x0b0 R21 #define R_x0c0 R22 #define R_x0d0 R23 #define R_x0e0 R24 #define R_x0f0 R25 #define R_x100 R26 #define R_x110 R27 // V0-V7 are A-H // V8-V23 are used for the message schedule #define KI V24 #define FUNC V25 #define S0 V26 #define S1 V27 #define s0 V28 #define s1 V29
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 23:33:27 UTC 2023 - 14.5K bytes - Viewed (0) -
src/internal/bytealg/index_ppc64x.s
// R16=index value 16 // R17=index value 17 // R18=index value 18 // R19=index value 1 // R26=LASTBYTE of string // R27=LASTSTR last start byte to compare with sep // R8, R9 scratch // V0=sep left justified zero fill // CR4=sep length >= 16 #define SEPMASK V17 #define LASTBYTE R26 #define LASTSTR R27 #define ONES V20 #define SWAP V21 #define SWAP_ VS53
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 21 16:47:45 UTC 2023 - 31.6K bytes - Viewed (0) -
src/cmd/internal/obj/arm64/a.out.go
const ( REG_SPECIAL = obj.RBaseARM64 + 1<<12 ) // Register assignments: // // compiler allocates R0 up as temps // compiler allocates register variables R7-R25 // compiler allocates external registers R26 down // // compiler allocates register variables F7-F26 // compiler allocates external registers F26 down const ( REGMIN = REG_R7 // register variables allocated from here to REGMAX
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Oct 18 17:56:30 UTC 2023 - 18.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/MIPSOps.go
"R6", "R7", "R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15", "R16", "R17", "R18", "R19", "R20", "R21", "R22", //REGTMP "R24", "R25", // R26 reserved by kernel // R27 reserved by kernel "R28", "SP", // aka R29 "g", // aka R30 "R31", // REGLINK // odd FP registers contain high parts of 64-bit FP values "F0", "F2", "F4", "F6",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 24 14:43:03 UTC 2023 - 24K bytes - Viewed (0)