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Results 1 - 7 of 7 for vdiveuw (0.17 sec)

  2. github.com/golang/go

    src/cmd/asm/internal/asm/testdata/ppc64_p10.s 

    	VCTZDM V1, V2, V3                       // 106117c4
	VDIVESD V1, V2, V3                      // 106113cb
	VDIVESQ V1, V2, V3                      // 1061130b
	VDIVESW V1, V2, V3                      // 1061138b
	VDIVEUD V1, V2, V3                      // 106112cb
	VDIVEUQ V1, V2, V3                      // 1061120b
	VDIVEUW V1, V2, V3                      // 1061128b
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Mar 23 20:52:57 UTC 2023
    - 14.3K bytes
    - Viewed (0)
  3. github.com/golang/go

    src/cmd/internal/obj/ppc64/asm9_gtables.go 

    	"VEXTDUBVLX",
	"VEXTDDVRX",
	"VEXTDDVLX",
	"VEXPANDWM",
	"VEXPANDQM",
	"VEXPANDHM",
	"VEXPANDDM",
	"VEXPANDBM",
	"VDIVUW",
	"VDIVUQ",
	"VDIVUD",
	"VDIVSW",
	"VDIVSQ",
	"VDIVSD",
	"VDIVEUW",
	"VDIVEUQ",
	"VDIVEUD",
	"VDIVESW",
	"VDIVESQ",
	"VDIVESD",
	"VCTZDM",
	"VCNTMBW",
	"VCNTMBH",
	"VCNTMBD",
	"VCNTMBB",
	"VCMPUQ",
	"VCMPSQ",
	"VCMPGTUQCC",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Nov 16 20:18:50 UTC 2022
    - 42.6K bytes
    - Viewed (0)
  4. github.com/golang/go

    src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/tables.go 

    	VCTZDM:         "vctzdm",
	VDIVESD:        "vdivesd",
	VDIVESQ:        "vdivesq",
	VDIVESW:        "vdivesw",
	VDIVEUD:        "vdiveud",
	VDIVEUQ:        "vdiveuq",
	VDIVEUW:        "vdiveuw",
	VDIVSD:         "vdivsd",
	VDIVSQ:         "vdivsq",
	VDIVSW:         "vdivsw",
	VDIVUD:         "vdivud",
	VDIVUQ:         "vdivuq",
	VDIVUW:         "vdivuw",
	VEXPANDBM:      "vexpandbm",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Nov 22 17:16:14 UTC 2022
    - 334.7K bytes
    - Viewed (0)
  5. github.com/golang/go

    src/cmd/internal/obj/riscv/anames.go 

    	"SRLIW",
	"SRAIW",
	"ADDW",
	"SLLW",
	"SRLW",
	"SUBW",
	"SRAW",
	"LD",
	"SD",
	"MUL",
	"MULH",
	"MULHU",
	"MULHSU",
	"MULW",
	"DIV",
	"DIVU",
	"REM",
	"REMU",
	"DIVW",
	"DIVUW",
	"REMW",
	"REMUW",
	"LRD",
	"SCD",
	"LRW",
	"SCW",
	"AMOSWAPD",
	"AMOADDD",
	"AMOANDD",
	"AMOORD",
	"AMOXORD",
	"AMOMAXD",
	"AMOMAXUD",
	"AMOMIND",
	"AMOMINUD",
	"AMOSWAPW",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Mar 20 14:19:33 UTC 2024
    - 2.9K bytes
    - Viewed (0)
  6. github.com/golang/go

    src/cmd/compile/internal/ssa/_gen/RISCV64.rules 

    (Div64 x y [false])  => (DIV x y)
(Div64u ...) => (DIVU ...)
(Div32 x y [false])  => (DIVW x y)
(Div32u ...) => (DIVUW ...)
(Div16 x y [false])  => (DIVW  (SignExt16to32 x) (SignExt16to32 y))
(Div16u x y) => (DIVUW (ZeroExt16to32 x) (ZeroExt16to32 y))
(Div8 x y)   => (DIVW  (SignExt8to32 x)  (SignExt8to32 y))
(Div8u x y)  => (DIVUW (ZeroExt8to32 x)  (ZeroExt8to32 y))

(Hmul64 ...)  => (MULH  ...)
(Hmul64u ...) => (MULHU ...)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Mar 07 14:57:07 UTC 2024
    - 40.3K bytes
    - Viewed (0)
  7. github.com/golang/go

    src/cmd/internal/obj/riscv/cpu.go 

    	// 5.3: Load and Store Instructions (RV64I)
	ALD
	ASD

	// 7.1: Multiplication Operations
	AMUL
	AMULH
	AMULHU
	AMULHSU
	AMULW
	ADIV
	ADIVU
	AREM
	AREMU
	ADIVW
	ADIVUW
	AREMW
	AREMUW

	// 8.2: Load-Reserved/Store-Conditional Instructions
	ALRD
	ASCD
	ALRW
	ASCW

	// 8.3: Atomic Memory Operations
	AAMOSWAPD
	AAMOADDD
	AAMOANDD
	AAMOORD
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Mar 20 14:19:33 UTC 2024
    - 13.1K bytes
    - Viewed (0)
  8. github.com/golang/go

    src/cmd/internal/obj/riscv/inst.go 

    		return &inst{0x13, 0x1, 0x1, 1537, 0x30}
	case ACTZW:
		return &inst{0x1b, 0x1, 0x1, 1537, 0x30}
	case ADIV:
		return &inst{0x33, 0x4, 0x0, 32, 0x1}
	case ADIVU:
		return &inst{0x33, 0x5, 0x0, 32, 0x1}
	case ADIVUW:
		return &inst{0x3b, 0x5, 0x0, 32, 0x1}
	case ADIVW:
		return &inst{0x3b, 0x4, 0x0, 32, 0x1}
	case AEBREAK:
		return &inst{0x73, 0x0, 0x1, 1, 0x0}
	case AECALL:
		return &inst{0x73, 0x0, 0x0, 0, 0x0}
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Mar 20 14:19:33 UTC 2024
    - 13.9K bytes
    - Viewed (0)
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