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Results 1 - 10 of 22 for rldcl (0.11 sec)

  1. src/cmd/internal/obj/ppc64/anames.go

    	"MULHDU",
    	"MULHDUCC",
    	"MULLD",
    	"MULLDCC",
    	"MULLDVCC",
    	"MULLDV",
    	"RFID",
    	"RLDMI",
    	"RLDMICC",
    	"RLDIMI",
    	"RLDIMICC",
    	"RLDC",
    	"RLDCCC",
    	"RLDCR",
    	"RLDCRCC",
    	"RLDICR",
    	"RLDICRCC",
    	"RLDCL",
    	"RLDCLCC",
    	"RLDICL",
    	"RLDICLCC",
    	"RLDIC",
    	"RLDICCC",
    	"CLRLSLDI",
    	"ROTL",
    	"ROTLW",
    	"SLBIA",
    	"SLBIE",
    	"SLBMFEE",
    	"SLBMFEV",
    	"SLBMTE",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Apr 01 18:50:29 UTC 2024
    - 6.7K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/ppc64.s

    	RLDIMICC $0, R4, $7, R6         // 788601cd
    	RLDC $0, R4, $15, R6            // 78860728
    	RLDC R3, $32, $12, R4           // 7864030a
    	RLDC R3, $8, $32, R4            // 78644028
    	RLDCCC R3, $32, $12, R4         // 7864030b
    	RLDCCC R3, $8, $32, R4          // 78644029
    	RLDCCC $0, R4, $15, R6          // 78860729
    	RLDCL $0, R4, $7, R6            // 78860770
    	RLDCLCC $0, R4, $15, R6         // 78860721
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri May 17 21:53:50 UTC 2024
    - 50.2K bytes
    - Viewed (0)
  3. src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/tables.go

    	MULLDO:         "mulldo",
    	MULLDOCC:       "mulldo.",
    	RFID:           "rfid",
    	RLDCL:          "rldcl",
    	RLDCLCC:        "rldcl.",
    	RLDCR:          "rldcr",
    	RLDCRCC:        "rldcr.",
    	RLDIC:          "rldic",
    	RLDICCC:        "rldic.",
    	RLDICL:         "rldicl",
    	RLDICLCC:       "rldicl.",
    	RLDICR:         "rldicr",
    	RLDICRCC:       "rldicr.",
    	RLDIMI:         "rldimi",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Nov 22 17:16:14 UTC 2022
    - 334.7K bytes
    - Viewed (0)
  4. src/cmd/internal/obj/ppc64/asm9.go

    	{as: ARLDCL, a1: C_U15CON, a2: C_REG, a3: C_32CON, a6: C_REG, type_: 29, size: 4},
    	{as: ARLDCL, a1: C_REG, a2: C_REG, a3: C_32CON, a6: C_REG, type_: 14, size: 4},
    	{as: ARLDICL, a1: C_REG, a2: C_REG, a3: C_32CON, a6: C_REG, type_: 14, size: 4},
    	{as: ARLDICL, a1: C_U15CON, a2: C_REG, a3: C_32CON, a6: C_REG, type_: 14, size: 4},
    	{as: ARLDCL, a1: C_REG, a3: C_32CON, a6: C_REG, type_: 14, size: 4},
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 15 13:55:28 UTC 2024
    - 156.1K bytes
    - Viewed (0)
  5. test/codegen/constants.go

    	// ppc64x: "MOVD\t[$]-1", "RLDC\tR[0-9]+, [$]44, [$]63,"
    	out[0] = 0xFFFFF00000000001
    	// ppc64x: "MOVD\t[$]-1", "RLDC\tR[0-9]+, [$]43, [$]63,"
    	out[1] = 0xFFFFF80000000001
    	// ppc64x: "MOVD\t[$]-1", "RLDC\tR[0-9]+, [$]43, [$]4,"
    	out[2] = 0x0FFFF80000000000
    	// ppc64x/power8: "MOVD\t[$]-1", "RLDC\tR[0-9]+, [$]33, [$]63,"
    	// ppc64x/power9: "MOVD\t[$]-1", "RLDC\tR[0-9]+, [$]33, [$]63,"
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 05 14:03:32 UTC 2023
    - 1.1K bytes
    - Viewed (0)
  6. src/cmd/compile/internal/ssa/_gen/PPC64latelower.rules

    (AND x:(MOVDconst [m]) n) && isPPC64ValidShiftMask(m) => (RLDICL [encodePPC64RotateMask(0,m,64)] n)
    (AND x:(MOVDconst [m]) n) && m != 0 && isPPC64ValidShiftMask(^m) => (RLDICR [encodePPC64RotateMask(0,m,64)] n)
    
    // If the RLDICL does not rotate its value, a shifted value can be merged.
    (RLDICL [em] x:(SRDconst [s] a)) && (em&0xFF0000) == 0 => (RLDICL [mergePPC64RLDICLandSRDconst(em, s)] a)
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 19:59:38 UTC 2024
    - 3.8K bytes
    - Viewed (0)
  7. test/codegen/shift.go

    func lshMask64x64(v int64, s uint64) int64 {
    	// arm64:"LSL",-"AND"
    	// ppc64x:"RLDICL",-"ORN",-"ISEL"
    	// riscv64:"SLL",-"AND\t",-"SLTIU"
    	// s390x:-"RISBGZ",-"AND",-"LOCGR"
    	return v << (s & 63)
    }
    
    func rshMask64Ux64(v uint64, s uint64) uint64 {
    	// arm64:"LSR",-"AND",-"CSEL"
    	// ppc64x:"RLDICL",-"ORN",-"ISEL"
    	// riscv64:"SRL\t",-"AND\t",-"SLTIU"
    	// s390x:-"RISBGZ",-"AND",-"LOCGR"
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue May 21 18:53:43 UTC 2024
    - 12.7K bytes
    - Viewed (0)
  8. test/codegen/bool.go

    	// amd64:"ANDL\t[$]1",-"SETB"
    	// ppc64x:"RLDICL",-"CMP",-"ISEL"
    	b := x&1 != 0
    	return c && b
    }
    
    func convertNeqBool32(x uint32) bool {
    	// ppc64x:"RLDICL",-"CMPW",-"ISEL"
    	return x&1 != 0
    }
    
    func convertEqBool32(x uint32) bool {
    	// ppc64x:"RLDICL",-"CMPW","XOR",-"ISEL"
    	return x&1 == 0
    }
    
    func convertNeqBool64(x uint64) bool {
    	// ppc64x:"RLDICL",-"CMP",-"ISEL"
    	return x&1 != 0
    }
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Nov 13 22:12:32 UTC 2023
    - 6.7K bytes
    - Viewed (0)
  9. src/hash/crc32/crc32_ppc64le.s

    	MOVWZ	4(R5),R9	// 4-7 bytes of p
    	MOVD	R4,R10		// &tab[0]
    	XOR	R7,R8,R7	// crc ^= byte[0:3]
    	RLDICL	$40,R9,$56,R17	// p[7]
    	SLD	$2,R17,R17	// p[7]*4
    	RLDICL	$40,R7,$56,R8	// crc>>24
    	SLD	$2,R8,R8	// crc>>24*4
    	RLDICL	$48,R9,$56,R18	// p[6]
    	SLD	$2,R18,R18	// p[6]*4
    	MOVWZ	(R10)(R17),R21	// tab[0][p[7]]
    	ADD	$1024,R10,R10	// tab[1]
    	RLDICL	$56,R9,$56,R19	// p[5]
    	SLD	$2,R19,R19	// p[5]*4:1
    	MOVWZ	(R10)(R18),R22	// tab[1][p[6]]
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 06 12:09:50 UTC 2024
    - 13.1K bytes
    - Viewed (0)
  10. test/codegen/arithmetic.go

    	// arm64:"TST\t[$]63",-"UDIV",-"ASR",-"AND"
    	// ppc64x:"ANDCC",-"RLDICL",-"SRAD",-"CMP"
    	a := n1%64 == 0 // signed divisible
    
    	// 386:"TESTL\t[$]63",-"DIVL",-"SHRL"
    	// amd64:"TESTQ\t[$]63",-"DIVQ",-"SHRQ"
    	// arm:"AND\t[$]63",-".*udiv",-"SRA"
    	// arm64:"TST\t[$]63",-"UDIV",-"ASR",-"AND"
    	// ppc64x:"ANDCC",-"RLDICL",-"SRAD",-"CMP"
    	b := n2%64 != 0 // signed indivisible
    
    	return a, b
    }
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri May 17 15:28:00 UTC 2024
    - 15.2K bytes
    - Viewed (0)
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