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Results 1 - 10 of 12 for ddivq (0.05 sec)
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src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/tables.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 22 17:16:14 UTC 2022 - 334.7K bytes - Viewed (0) -
test/codegen/arithmetic.go
// 386:"IMUL3L\t[$]-1431655765","ROLL\t[$]31",-"DIVQ" // arm64:"MOVD\t[$]-6148914691236517205","MOVD\t[$]3074457345618258602","MUL","ROR",-"DIV" // arm:"MUL","CMP\t[$]715827882",-".*udiv" // ppc64x:"MULLD","ROTL\t[$]63" even := n%6 == 0 // amd64:"MOVQ\t[$]-8737931403336103397","IMULQ",-"ROLQ",-"DIVQ" // 386:"IMUL3L\t[$]678152731",-"ROLL",-"DIVQ"
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 17 15:28:00 UTC 2024 - 15.2K bytes - Viewed (0) -
src/crypto/internal/boring/build-goboring.sh
# reduce top 64 bits mod divisor movq %rsi, %rax xorl %edx, %edx divq %r8 # reduce full 128-bit mod divisor # quotient fits in 64 bits because top 64 bits have been reduced < divisor. # (even though we only care about the remainder, divq also computes # the quotient, and it will trap if the quotient is too large.) movq %rdi, %rax divq %r8 # expand remainder to 128 for return movq %rdx, %rax
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jan 26 22:52:27 UTC 2024 - 5.6K bytes - Viewed (0) -
src/cmd/internal/obj/riscv/anames.go
"FCVTSD", "FCVTDS", "FSGNJD", "FSGNJND", "FSGNJXD", "FMVXD", "FMVDX", "FEQD", "FLTD", "FLED", "FCLASSD", "FLQ", "FSQ", "FADDQ", "FSUBQ", "FMULQ", "FDIVQ", "FMINQ", "FMAXQ", "FSQRTQ", "FMADDQ", "FMSUBQ", "FNMADDQ", "FNMSUBQ", "FCVTWQ", "FCVTLQ", "FCVTSQ", "FCVTDQ", "FCVTQW", "FCVTQL", "FCVTQS", "FCVTQD",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Mar 20 14:19:33 UTC 2024 - 2.9K bytes - Viewed (0) -
src/cmd/internal/obj/x86/anames.go
"FXRSTOR", "FXRSTOR64", "FXSAVE", "FXSAVE64", "FXTRACT", "FYL2X", "FYL2XP1", "HADDPD", "HADDPS", "HLT", "HSUBPD", "HSUBPS", "ICEBP", "IDIVB", "IDIVL", "IDIVQ", "IDIVW", "IMUL3L", "IMUL3Q", "IMUL3W", "IMULB", "IMULL", "IMULQ", "IMULW", "INB", "INCB", "INCL", "INCQ", "INCW", "INL", "INSB", "INSERTPS",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 11 18:32:50 UTC 2023 - 19.1K bytes - Viewed (0) -
test/codegen/mathbits.go
func Div(hi, lo, x uint) (q, r uint) { // amd64:"DIVQ" return bits.Div(hi, lo, x) } func Div32(hi, lo, x uint32) (q, r uint32) { // arm64:"ORR","UDIV","MSUB",-"UREM" return bits.Div32(hi, lo, x) } func Div64(hi, lo, x uint64) (q, r uint64) { // amd64:"DIVQ" return bits.Div64(hi, lo, x) } func Div64degenerate(x uint64) (q, r uint64) { // amd64:-"DIVQ" return bits.Div64(0, x, 5)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 18:51:17 UTC 2024 - 19.6K bytes - Viewed (0) -
src/cmd/internal/obj/x86/aenum.go
ACVTTPD2PL ACVTTPS2PL ACVTTSD2SL ACVTTSD2SQ ACVTTSS2SL ACVTTSS2SQ ACWD ACWDE ADAA ADAS ADECB ADECL ADECQ ADECW ADIVB ADIVL ADIVPD ADIVPS ADIVQ ADIVSD ADIVSS ADIVW ADPPD ADPPS AEMMS AENTER AEXTRACTPS AF2XM1 AFABS AFADDD AFADDDP AFADDF AFADDL AFADDW AFBLD AFBSTP AFCHS AFCLEX
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 11 18:32:50 UTC 2023 - 16.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/AMD64Ops.go
// DIVx[U] computes [arg0 / arg1, arg0 % arg1] // For signed versions, AuxInt non-zero means that the divisor has been proved to be not -1. {name: "DIVQ", argLength: 2, reg: gp11div, typ: "(Int64,Int64)", asm: "IDIVQ", aux: "Bool", clobberFlags: true}, {name: "DIVL", argLength: 2, reg: gp11div, typ: "(Int32,Int32)", asm: "IDIVL", aux: "Bool", clobberFlags: true},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Aug 04 16:40:24 UTC 2023 - 98K bytes - Viewed (1) -
src/cmd/asm/internal/asm/testdata/amd64enc.s
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Oct 08 21:38:44 UTC 2021 - 581.9K bytes - Viewed (0) -
src/cmd/internal/obj/x86/asm6.go
{ADECW, yincq, Pe, opBytes{0xff, 01}}, {ADIVB, ydivb, Pb, opBytes{0xf6, 06}}, {ADIVL, ydivl, Px, opBytes{0xf7, 06}}, {ADIVPD, yxm, Pe, opBytes{0x5e}}, {ADIVPS, yxm, Pm, opBytes{0x5e}}, {ADIVQ, ydivl, Pw, opBytes{0xf7, 06}}, {ADIVSD, yxm, Pf2, opBytes{0x5e}}, {ADIVSS, yxm, Pf3, opBytes{0x5e}}, {ADIVW, ydivl, Pe, opBytes{0xf7, 06}}, {ADPPD, yxshuf, Pq, opBytes{0x3a, 0x41, 0}},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 15:44:14 UTC 2024 - 146.9K bytes - Viewed (0)