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Results 1 - 8 of 8 for FCVTSD (0.5 sec)
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src/cmd/internal/obj/riscv/anames.go
"FMIND", "FMAXD", "FSQRTD", "FMADDD", "FMSUBD", "FNMADDD", "FNMSUBD", "FCVTWD", "FCVTLD", "FCVTDW", "FCVTDL", "FCVTWUD", "FCVTLUD", "FCVTDWU", "FCVTDLU", "FCVTSD", "FCVTDS", "FSGNJD", "FSGNJND", "FSGNJXD", "FMVXD", "FMVDX", "FEQD", "FLTD", "FLED", "FCLASSD", "FLQ", "FSQ", "FADDQ", "FSUBQ", "FMULQ", "FDIVQ",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Mar 20 14:19:33 UTC 2024 - 2.9K bytes - Viewed (0) -
src/cmd/internal/obj/arm64/anames.go
"FADDS", "FCCMPD", "FCCMPED", "FCCMPES", "FCCMPS", "FCMPD", "FCMPED", "FCMPES", "FCMPS", "FCSELD", "FCSELS", "FCVTDH", "FCVTDS", "FCVTHD", "FCVTHS", "FCVTSD", "FCVTSH", "FCVTZSD", "FCVTZSDW", "FCVTZSS", "FCVTZSSW", "FCVTZUD", "FCVTZUDW", "FCVTZUS", "FCVTZUSW", "FDIVD", "FDIVS", "FLDPD", "FLDPQ", "FLDPS",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 18 01:40:37 UTC 2023 - 5.4K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/RISCV64Ops.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 07 14:57:07 UTC 2024 - 30.7K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/riscv64.s
FCVTLUD.RTZ F0, X5 // d31230c2 FCVTLUD.RDN F0, X5 // d32230c2 FCVTLUD.RUP F0, X5 // d33230c2 FCVTLUD.RMM F0, X5 // d34230c2 FCVTDWU X5, F0 // 538012d2 FCVTDLU X5, F0 // 538032d2 FCVTSD F0, F1 // d3001040 FCVTDS F0, F1 // d3000042 FSGNJD F1, F0, F2 // 53011022 FSGNJND F1, F0, F2 // 53111022 FSGNJXD F1, F0, F2 // 53211022 FMVXD F0, X5 // d30200e2
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Mar 22 04:42:21 UTC 2024 - 16.7K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM64Ops.go
{name: "FCVTZUS", argLength: 1, reg: fpgp, asm: "FCVTZUS"}, // float32 -> uint64 {name: "FCVTZUD", argLength: 1, reg: fpgp, asm: "FCVTZUD"}, // float64 -> uint64 {name: "FCVTSD", argLength: 1, reg: fp11, asm: "FCVTSD"}, // float32 -> float64 {name: "FCVTDS", argLength: 1, reg: fp11, asm: "FCVTDS"}, // float64 -> float32 // floating-point round to integral
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 58.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/RISCV64.rules
(Cvt32Fto32 ...) => (FCVTWS ...) (Cvt32Fto64 ...) => (FCVTLS ...) (Cvt64Fto32 ...) => (FCVTWD ...) (Cvt64Fto64 ...) => (FCVTLD ...) (Cvt32Fto64F ...) => (FCVTDS ...) (Cvt64Fto32F ...) => (FCVTSD ...) (CvtBoolToUint8 ...) => (Copy ...) (Round(32|64)F ...) => (LoweredRound(32|64)F ...) (Slicemask <t> x) => (SRAI [63] (NEG <t> x)) // Truncations
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 07 14:57:07 UTC 2024 - 40.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM64.rules
(Cvt64Fto64 ...) => (FCVTZSD ...) (Cvt32Fto32U ...) => (FCVTZUSW ...) (Cvt64Fto32U ...) => (FCVTZUDW ...) (Cvt32Fto64U ...) => (FCVTZUS ...) (Cvt64Fto64U ...) => (FCVTZUD ...) (Cvt32Fto64F ...) => (FCVTSD ...) (Cvt64Fto32F ...) => (FCVTDS ...) (CvtBoolToUint8 ...) => (Copy ...) (Round32F ...) => (LoweredRound32F ...) (Round64F ...) => (LoweredRound64F ...) // comparisons
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 113.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/opGen.go
}, outputs: []outputInfo{ {0, 670826495}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R19 R20 R21 R22 R23 R24 R25 R26 R30 }, }, }, { name: "FCVTSD", argLen: 1, asm: arm64.AFCVTSD, reg: regInfo{ inputs: []inputInfo{
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 1M bytes - Viewed (0)