"FMVWX",
	"FEQS",
	"FLTS",
	"FLES",
	"FCLASSS",
	"FLD",
	"FSD",
	"FADDD",
	"FSUBD",
	"FMULD",
	"FDIVD",
	"FMIND",
	"FMAXD",
	"FSQRTD",
	"FMADDD",
	"FMSUBD",
	"FNMADDD",
	"FNMSUBD",
	"FCVTWD",
	"FCVTLD",
	"FCVTDW",
	"FCVTDL",
	"FCVTWUD",
	"FCVTLUD",
	"FCVTDWU",
	"FCVTDLU",
	"FCVTSD",
	"FCVTDS",
	"FSGNJD",
	"FSGNJND",
	"FSGNJXD",

func fms(x, y, z float64) float64 {
	// riscv64:"FMSUBD"
	return math.FMA(x, y, -z)
}

func fnms(x, y, z float64) float64 {
	// riscv64:"FNMSUBD",-"FNMADDD"
	return math.FMA(-x, y, z)
}

func fnma(x, y, z float64) float64 {
	// riscv64:"FNMADDD",-"FNMSUBD"
	return math.FMA(x, -y, -z)
}

func fromFloat64(f64 float64) uint64 {
	// amd64:"MOVQ\tX.*, [^X].*"
	// arm64:"FMOVD\tF.*, R.*"

	"FMAXNMS",
	"FMAXS",
	"FMIND",
	"FMINNMD",
	"FMINNMS",
	"FMINS",
	"FMOVD",
	"FMOVQ",
	"FMOVS",
	"FMSUBD",
	"FMSUBS",
	"FMULD",
	"FMULS",
	"FNEGD",
	"FNEGS",
	"FNMADDD",
	"FNMADDS",
	"FNMSUBD",
	"FNMSUBS",
	"FNMULD",
	"FNMULS",
	"FRINTAD",
	"FRINTAS",
	"FRINTID",
	"FRINTIS",
	"FRINTMD",
	"FRINTMS",
	"FRINTND",
	"FRINTNS",
	"FRINTPD",

Examples:

	MADD R2, R30, R22, R6       <=>    madd x6, x22, x2, x30
	SMSUBL R10, R3, R17, R27    <=>    smsubl x27, w17, w10, x3

(3) FMADDD, FMADDS, FMSUBD, FMSUBS, FNMADDD, FNMADDS, FNMSUBD, FNMSUBS <Fm>, <Fa>, <Fn>, <Fd>

Examples:

	FMADDD F30, F20, F3, F29    <=>    fmadd d29, d3, d30, d20
	FNMSUBS F7, F25, F7, F22    <=>    fnmsub s22, s7, s7, s25

		{name: "FMSUBD", argLength: 3, reg: fp31, asm: "FMSUBD", commutative: true, typ: "Float64"},                                         // (arg0 * arg1) - arg2
		{name: "FNMADDD", argLength: 3, reg: fp31, asm: "FNMADDD", commutative: true, typ: "Float64"},                                       // -(arg0 * arg1) + arg2

	FSGNJXD	F1, F0, F2				// 53211022
	FMVXD	F0, X5					// d30200e2
	FMVDX	X5, F0					// 538002f2
	FMADDD	F1, F2, F3, F4				// 4382201a
	FMSUBD	F1, F2, F3, F4				// 4782201a
	FNMSUBD	F1, F2, F3, F4				// 4b82201a
	FNMADDD	F1, F2, F3, F4				// 4f82201a

	// 12.6: Double-Precision Floating-Point Classify Instruction
	FCLASSD	F0, X5					// d31200e2

	// RISC-V Bit-Manipulation ISA-extensions (1.0)

		{name: "FMADDD", argLength: 3, reg: fp31, asm: "FMADDD"},   // +arg0 + (arg1 * arg2)
		{name: "FNMADDS", argLength: 3, reg: fp31, asm: "FNMADDS"}, // -arg0 - (arg1 * arg2)
		{name: "FNMADDD", argLength: 3, reg: fp31, asm: "FNMADDD"}, // -arg0 - (arg1 * arg2)
		{name: "FMSUBS", argLength: 3, reg: fp31, asm: "FMSUBS"},   // +arg0 - (arg1 * arg2)
		{name: "FMSUBD", argLength: 3, reg: fp31, asm: "FMSUBD"},   // +arg0 - (arg1 * arg2)

	//TODO VFNEG V18.S2, V12.S2                // 4cfaa02e
	FNEGS F16, F5                              // 0542211e
	FNEGD F31, F31                             // ff43611e
	FNMADDS F17, F22, F6, F20                  // d458311f
	FNMADDD F15, F0, F26, F20                  // 54036f1f
	FNMSUBS F14, F16, F27, F14                 // 6ec32e1f
	FNMSUBD F29, F25, F8, F10                  // 0ae57d1f
	FNMULS F24, F22, F18                       // d28a381e

}
func rewriteValueRISCV64_OpRISCV64FMSUBD(v *Value) bool {
	v_2 := v.Args[2]
	v_1 := v.Args[1]
	v_0 := v.Args[0]
	// match: (FMSUBD neg:(FNEGD x) y z)
	// cond: neg.Uses == 1
	// result: (FNMADDD x y z)
	for {
		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
			neg := v_0
			if neg.Op != OpRISCV64FNEGD {
				continue
			}
			x := neg.Args[0]
			y := v_1
			z := v_2

	FMADDD	F4, F5, F4, F4                  // 8414441f
	FMSUBS	F13, F21, F13, F19              // b3d50d1f
	FMSUBD	F11, F7, F15, F31               // ff9d4b1f
	FNMADDS	F1, F3, F2, F4                  // 440c211f
	FNMADDD	F1, F3, F2, F4                  // 440c611f
	FNMSUBS	F1, F3, F2, F4                  // 448c211f
	FNMSUBD	F1, F3, F2, F4                  // 448c611f
	FADDS	F2, F3, F4                      // 6428221e