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Results 1 - 2 of 2 for FLDPD (0.03 sec)

  1. src/cmd/asm/internal/asm/testdata/arm64.s

    	FLDPD	-8(RSP), (F1, F2)   // e18b7f6d
    	FLDPD	11(RSP), (F1, F2)   // fb2f0091610b406d
    	FLDPD	1024(RSP), (F1, F2) // fb031091610b406d
    	FLDPD.W	8(RSP), (F1, F2)    // e18bc06d
    	FLDPD.P	8(RSP), (F1, F2)    // e18bc06c
    	FLDPD	-31(R0), (F1, F2)   // 1b7c00d1610b406d
    	FLDPD	-4(R0), (F1, F2)    // 1b1000d1610b406d
    	FLDPD	-8(R0), (F1, F2)    // 01887f6d
    	FLDPD	x(SB), (F1, F2)
    	FLDPD	x+8(SB), (F1, F2)
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Wed Jul 24 18:45:14 UTC 2024
    - 95.2K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/arm64error.s

    	FSTPQ	(R1, R2), (R0)                                   // ERROR "invalid register pair"
    	FLDPD	(R0), (R1, R2)                                   // ERROR "invalid register pair"
    	FLDPD	(R1), (F2, F2)                                   // ERROR "constrained unpredictable behavior"
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Fri Dec 08 03:28:17 UTC 2023
    - 37.8K bytes
    - Viewed (0)
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