MULQ (BX)
	MOVQ AX, DI
	MOVQ DX, SI

	// r0 += 19×a1×b4
	MOVQ   8(CX), AX
	IMUL3Q $0x13, AX, AX
	MULQ   32(BX)
	ADDQ   AX, DI
	ADCQ   DX, SI

	// r0 += 19×a2×b3
	MOVQ   16(CX), AX
	IMUL3Q $0x13, AX, AX
	MULQ   24(BX)
	ADDQ   AX, DI
	ADCQ   DX, SI

	// r0 += 19×a3×b2
	MOVQ   24(CX), AX
	IMUL3Q $0x13, AX, AX
	MULQ   16(BX)
	ADDQ   AX, DI
	ADCQ   DX, SI

	// r0 += 19×a4×b1

	RET
TEXT ·a26(SB), 0, $0-0
	CMPL runtime·writeBarrier(SB), $0
	IMUL3Q $33, AX, R15
	ADDQ $1, R15
	RET
TEXT ·a27(SB), 0, $0-0
	CMPL runtime·writeBarrier(SB), $0
	IMUL3Q $33, R15, AX // ERROR "when dynamic linking, R15 is clobbered by a global variable access and is used here"
	RET
TEXT ·a28(SB), 0, $0-0

func addMul64(r uint128, i uint64, aX, bX namedComponent) {
	switch i {
	case 1:
		Comment(fmt.Sprintf("%s += %s×%s", r, aX, bX))
		Load(aX, RAX)
	default:
		Comment(fmt.Sprintf("%s += %d×%s×%s", r, i, aX, bX))
		IMUL3Q(Imm(i), Load(aX, GP64()), RAX)
	}
	MULQ(mustAddr(bX)) // RDX, RAX = RAX * bX
	ADDQ(RAX, r.lo)
	ADCQ(RDX, r.hi)
}

// shiftRightBy51 returns r >> 51 and r.lo.
//

	b[0] *= b[1]
}

// Multiplications merging tests

func MergeMuls1(n int) int {
	// amd64:"IMUL3Q\t[$]46"
	// 386:"IMUL3L\t[$]46"
	// ppc64x:"MULLD\t[$]46"
	return 15*n + 31*n // 46n
}

func MergeMuls2(n int) int {
	// amd64:"IMUL3Q\t[$]23","(ADDQ\t[$]29)|(LEAQ\t29)"
	// 386:"IMUL3L\t[$]23","ADDL\t[$]29"
	// ppc64x/power9:"MADDLD",-"MULLD\t[$]23",-"ADD\t[$]29"

	"FXSAVE64",
	"FXTRACT",
	"FYL2X",
	"FYL2XP1",
	"HADDPD",
	"HADDPS",
	"HLT",
	"HSUBPD",
	"HSUBPS",
	"ICEBP",
	"IDIVB",
	"IDIVL",
	"IDIVQ",
	"IDIVW",
	"IMUL3L",
	"IMUL3Q",
	"IMUL3W",
	"IMULB",
	"IMULL",
	"IMULQ",
	"IMULW",
	"INB",
	"INCB",
	"INCL",
	"INCQ",
	"INCW",
	"INL",
	"INSB",
	"INSERTPS",
	"INSL",
	"INSW",
	"INT",

	IMUL3Q $-249346713, R11, R11            // 4d69db674523f1
	IMUL3Q $7, (BX), DX                     // 486b1307
	IMUL3Q $7, (R11), DX                    // 496b1307
	IMUL3Q $7, DX, DX                       // 486bd207
	IMUL3Q $7, R11, DX                      // 496bd307
	IMUL3Q $7, (BX), R11                    // 4c6b1b07
	IMUL3Q $7, (R11), R11                   // 4d6b1b07
	IMUL3Q $7, DX, R11                      // 4c6bda07

		{name: "MULL", argLength: 2, reg: gp21, asm: "IMULL", commutative: true, resultInArg0: true, clobberFlags: true},
		{name: "MULQconst", argLength: 1, reg: gp11, asm: "IMUL3Q", aux: "Int32", clobberFlags: true},
		{name: "MULLconst", argLength: 1, reg: gp11, asm: "IMUL3L", aux: "Int32", clobberFlags: true},