Search Options

Results per page
Sort
Preferred Languages
Advance

Results 1 - 6 of 6 for MOVBQSX (0.37 sec)

  1. src/cmd/compile/internal/ssa/_gen/AMD64.rules

    // the resulting extension (the outer type, not the inner type).
    (MOVLQSX (MOVLQSX x)) => (MOVLQSX x)
    (MOVLQSX (MOVWQSX x)) => (MOVWQSX x)
    (MOVLQSX (MOVBQSX x)) => (MOVBQSX x)
    (MOVWQSX (MOVWQSX x)) => (MOVWQSX x)
    (MOVWQSX (MOVBQSX x)) => (MOVBQSX x)
    (MOVBQSX (MOVBQSX x)) => (MOVBQSX x)
    (MOVLQZX (MOVLQZX x)) => (MOVLQZX x)
    (MOVLQZX (MOVWQZX x)) => (MOVWQZX x)
    (MOVLQZX (MOVBQZX x)) => (MOVBQZX x)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 12 19:38:41 UTC 2024
    - 93.9K bytes
    - Viewed (0)
  2. src/cmd/internal/obj/x86/anames.go

    	"MAXSS",
    	"MFENCE",
    	"MINPD",
    	"MINPS",
    	"MINSD",
    	"MINSS",
    	"MONITOR",
    	"MOVAPD",
    	"MOVAPS",
    	"MOVB",
    	"MOVBEL",
    	"MOVBEQ",
    	"MOVBEW",
    	"MOVBLSX",
    	"MOVBLZX",
    	"MOVBQSX",
    	"MOVBQZX",
    	"MOVBWSX",
    	"MOVBWZX",
    	"MOVDDUP",
    	"MOVHLPS",
    	"MOVHPD",
    	"MOVHPS",
    	"MOVL",
    	"MOVLHPS",
    	"MOVLPD",
    	"MOVLPS",
    	"MOVLQSX",
    	"MOVLQZX",
    	"MOVMSKPD",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Apr 11 18:32:50 UTC 2023
    - 19.1K bytes
    - Viewed (0)
  3. src/cmd/compile/internal/ssa/_gen/AMD64Ops.go

    		{name: "SETGEF", argLength: 1, reg: flagsgp, asm: "SETCC"}, // extract floating >= condition from arg0
    
    		{name: "MOVBQSX", argLength: 1, reg: gp11, asm: "MOVBQSX"}, // sign extend arg0 from int8 to int64
    		{name: "MOVBQZX", argLength: 1, reg: gp11, asm: "MOVBLZX"}, // zero extend arg0 from int8 to int64
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Aug 04 16:40:24 UTC 2023
    - 98K bytes
    - Viewed (1)
  4. src/cmd/asm/internal/asm/testdata/amd64enc.s

    	MOVBQSX (BX), DX                        // 480fbe13
    	MOVBQSX (R11), DX                       // 490fbe13
    	MOVBQSX DL, DX                          // 480fbed2
    	MOVBQSX R11, DX                         // 490fbed3
    	MOVBQSX (BX), R11                       // 4c0fbe1b
    	MOVBQSX (R11), R11                      // 4d0fbe1b
    	MOVBQSX DL, R11                         // 4c0fbeda
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Oct 08 21:38:44 UTC 2021
    - 581.9K bytes
    - Viewed (0)
  5. src/cmd/compile/internal/ssa/rewriteAMD64.go

    			break
    		}
    		v.reset(OpAMD64ANDLconst)
    		v.AuxInt = int32ToAuxInt(c & 0x7f)
    		v.AddArg(x)
    		return true
    	}
    	// match: (MOVBQSX (MOVBQSX x))
    	// result: (MOVBQSX x)
    	for {
    		if v_0.Op != OpAMD64MOVBQSX {
    			break
    		}
    		x := v_0.Args[0]
    		v.reset(OpAMD64MOVBQSX)
    		v.AddArg(x)
    		return true
    	}
    	return false
    }
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 12 19:38:41 UTC 2024
    - 712.7K bytes
    - Viewed (0)
  6. src/cmd/compile/internal/ssa/opGen.go

    		argLen: 1,
    		asm:    x86.ASETCC,
    		reg: regInfo{
    			outputs: []outputInfo{
    				{0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
    			},
    		},
    	},
    	{
    		name:   "MOVBQSX",
    		argLen: 1,
    		asm:    x86.AMOVBQSX,
    		reg: regInfo{
    			inputs: []inputInfo{
    				{0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
    			},
    			outputs: []outputInfo{
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 1M bytes
    - Viewed (0)
Back to top