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Results 1 - 10 of 10 for MOVBLZX (0.17 sec)

  1. test/codegen/issue25378.go

    package codegen
    
    var wsp = [256]bool{
    	' ':  true,
    	'\t': true,
    	'\n': true,
    	'\r': true,
    }
    
    func zeroExtArgByte(ch [2]byte) bool {
    	return wsp[ch[0]] // amd64:-"MOVBLZX\t..,.."
    }
    
    func zeroExtArgUint16(ch [2]uint16) bool {
    	return wsp[ch[0]] // amd64:-"MOVWLZX\t..,.."
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Apr 12 21:59:59 UTC 2021
    - 445 bytes
    - Viewed (0)
  2. src/cmd/asm/internal/lex/lex_test.go

    			"\tPINSRW	$index, (BP)(R8*4), xmm",
    			"#define LOAD(off, reg) \\",
    			"\tMOVBLZX	(off*4)(R12),	reg \\",
    			"\tADDB	reg,		DX",
    			"KEYROUND(X0, LOAD, 8, AX, BX, 0)",
    		),
    		"\n.MOVBLZX.(.BP.).(.DX.*.4.).,.R8.\n.\n.MOVBLZX.(.(.8.+.1.).*.4.).(.R12.).,.BX.\n.ADDB.BX.,.DX.\n.MOVB.R8.,.(.8.*.4.).(.R12.).\n.PINSRW.$.0.,.(.BP.).(.R8.*.4.).,.X0.\n",
    	},
    	{
    		"taken #ifdef",
    		lines(
    			"#define A",
    			"#ifdef A",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Aug 29 07:48:38 UTC 2023
    - 5.8K bytes
    - Viewed (0)
  3. test/codegen/memops.go

    	// amd64: `ORQ\t[$]77, 64\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*8\)`
    	x[i+8] |= 77
    	// amd64: `XORQ\t[$]77, 72\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*8\)`
    	x[i+9] ^= 77
    }
    
    func idxCompare(i int) int {
    	// amd64: `MOVBLZX\t1\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*1\), [A-Z]+[0-9]*`
    	if x8[i+1] < x8[0] {
    		return 0
    	}
    	// amd64: `MOVWLZX\t2\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*2\), [A-Z]+[0-9]*`
    	if x16[i+1] < x16[0] {
    		return 0
    	}
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Aug 04 16:40:24 UTC 2023
    - 12.5K bytes
    - Viewed (0)
  4. src/cmd/compile/internal/ssa/_gen/386Ops.go

    		{name: "MOVBLSX", argLength: 1, reg: gp11, asm: "MOVBLSX"}, // sign extend arg0 from int8 to int32
    		{name: "MOVBLZX", argLength: 1, reg: gp11, asm: "MOVBLZX"}, // zero extend arg0 from int8 to int32
    		{name: "MOVWLSX", argLength: 1, reg: gp11, asm: "MOVWLSX"}, // sign extend arg0 from int16 to int32
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 14 08:10:32 UTC 2023
    - 45.1K bytes
    - Viewed (0)
  5. src/cmd/internal/obj/x86/anames.go

    	"MAXSD",
    	"MAXSS",
    	"MFENCE",
    	"MINPD",
    	"MINPS",
    	"MINSD",
    	"MINSS",
    	"MONITOR",
    	"MOVAPD",
    	"MOVAPS",
    	"MOVB",
    	"MOVBEL",
    	"MOVBEQ",
    	"MOVBEW",
    	"MOVBLSX",
    	"MOVBLZX",
    	"MOVBQSX",
    	"MOVBQZX",
    	"MOVBWSX",
    	"MOVBWZX",
    	"MOVDDUP",
    	"MOVHLPS",
    	"MOVHPD",
    	"MOVHPS",
    	"MOVL",
    	"MOVLHPS",
    	"MOVLPD",
    	"MOVLPS",
    	"MOVLQSX",
    	"MOVLQZX",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Apr 11 18:32:50 UTC 2023
    - 19.1K bytes
    - Viewed (0)
  6. src/runtime/race_amd64.s

    // Generic atomic operation implementation.
    // AX already contains target function.
    TEXT	racecallatomic<>(SB), NOSPLIT|NOFRAME, $0-0
    	// Trigger SIGSEGV early.
    	MOVQ	16(SP), R12
    	MOVBLZX	(R12), R13
    	// Check that addr is within [arenastart, arenaend) or within [racedatastart, racedataend).
    	CMPQ	R12, runtime·racearenastart(SB)
    	JB	racecallatomic_data
    	CMPQ	R12, runtime·racearenaend(SB)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri May 17 18:37:29 UTC 2024
    - 15.1K bytes
    - Viewed (0)
  7. src/cmd/compile/internal/ssa/_gen/AMD64Ops.go

    		{name: "MOVBQSX", argLength: 1, reg: gp11, asm: "MOVBQSX"}, // sign extend arg0 from int8 to int64
    		{name: "MOVBQZX", argLength: 1, reg: gp11, asm: "MOVBLZX"}, // zero extend arg0 from int8 to int64
    		{name: "MOVWQSX", argLength: 1, reg: gp11, asm: "MOVWQSX"}, // sign extend arg0 from int16 to int64
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Aug 04 16:40:24 UTC 2023
    - 98K bytes
    - Viewed (1)
  8. src/cmd/asm/internal/asm/testdata/amd64enc.s

    	MOVWLZX R11, R11                        // 450fb7db
    	MOVBLZX (BX), DX                        // 0fb613
    	MOVBLZX (R11), DX                       // 410fb613
    	MOVBLZX DL, DX                          // 0fb6d2
    	MOVBLZX R11, DX                         // 410fb6d3
    	MOVBLZX (BX), R11                       // 440fb61b
    	MOVBLZX (R11), R11                      // 450fb61b
    	MOVBLZX DL, R11                         // 440fb6da
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Oct 08 21:38:44 UTC 2021
    - 581.9K bytes
    - Viewed (0)
  9. src/cmd/compile/internal/ssa/rewrite386.go

    		v.Aux = symToAux(mergeSym(sym1, sym2))
    		v.AddArg2(base, mem)
    		return true
    	}
    	return false
    }
    func rewriteValue386_Op386MOVBLZX(v *Value) bool {
    	v_0 := v.Args[0]
    	b := v.Block
    	// match: (MOVBLZX x:(MOVBload [off] {sym} ptr mem))
    	// cond: x.Uses == 1 && clobber(x)
    	// result: @x.Block (MOVBload <v.Type> [off] {sym} ptr mem)
    	for {
    		x := v_0
    		if x.Op != Op386MOVBload {
    			break
    		}
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Apr 21 21:05:46 UTC 2023
    - 262.4K bytes
    - Viewed (0)
  10. src/cmd/compile/internal/ssa/opGen.go

    		reg: regInfo{
    			inputs: []inputInfo{
    				{0, 239}, // AX CX DX BX BP SI DI
    			},
    			outputs: []outputInfo{
    				{0, 239}, // AX CX DX BX BP SI DI
    			},
    		},
    	},
    	{
    		name:   "MOVBLZX",
    		argLen: 1,
    		asm:    x86.AMOVBLZX,
    		reg: regInfo{
    			inputs: []inputInfo{
    				{0, 239}, // AX CX DX BX BP SI DI
    			},
    			outputs: []outputInfo{
    				{0, 239}, // AX CX DX BX BP SI DI
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 1M bytes
    - Viewed (0)
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