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Results 1 - 10 of 18 for bclr (0.04 sec)
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src/cmd/internal/obj/riscv/anames.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Mar 20 14:19:33 UTC 2024 - 2.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/riscv64.s
RORW $31, X13 // 9bd6f661 or 9bdff6019b961600b3e6df00 ORCB X5, X6 // 13d37228 REV8 X7, X8 // 13d4836b // 1.5: Single-bit Instructions (Zbs) BCLR X23, X24, X25 // b31c7c49 BCLR $63, X24 // 131cfc4b BCLRI $1, X25, X26 // 139d1c48 BEXT X26, X28, X29 // b35eae49 BEXT $63, X28 // 135efe4b BEXTI $1, X29, X30 // 13df1e48 BINV X30, X5, X6 // 3393e269
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Mar 22 04:42:21 UTC 2024 - 16.7K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/asm9.go
{as: ABR, a6: C_LR, type_: 18, size: 4}, // blr {as: ABR, a6: C_CTR, type_: 18, size: 4}, // bctr {as: ABC, a1: C_U15CON, a2: C_CRBIT, a6: C_BRA, type_: 16, size: 4}, // bc bo, bi, label {as: ABC, a1: C_U15CON, a2: C_CRBIT, a6: C_LR, type_: 18, size: 4}, // bclr bo, bi
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 13:55:28 UTC 2024 - 156.1K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/ppc64.s
BCL $20,CR0LT,$1,LR // 4e800821 BCL $20,CR0LT,$0,LR // 4e800021 BCL $20,CR0LT,LR // 4e800021 BCL $20,CR0GT,LR // 4e810021 BCL 20,CR0LT,LR // BCL $20,CR0LT,LR // 4e800021 BCL 20,undefined_symbol,LR // BCL $20,CR0LT,LR // 4e800021 BCL 20,undefined_symbol+1,LR // BCL $20,CR0GT,LR // 4e810021
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 17 21:53:50 UTC 2024 - 50.2K bytes - Viewed (0) -
src/cmd/link/internal/ppc64/asm.go
OP_TOCSAVE = 0xf8410018 // std r2,24(r1) OP_NOP = 0x60000000 // nop OP_BL = 0x48000001 // bl 0 OP_BCTR = 0x4e800420 // bctr OP_BCTRL = 0x4e800421 // bctrl OP_BCL = 0x40000001 // bcl OP_ADDI = 0x38000000 // addi OP_ADDIS = 0x3c000000 // addis OP_LD = 0xe8000000 // ld OP_PLA_PFX = 0x06100000 // pla (prefix instruction word)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 19 20:54:08 UTC 2024 - 63.7K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/sys/unix/asm_zos_s390x.s
MOVD $0, 0(R9) // R9 address of SAVSTACK_ASYNC LE_CALL // balr R7, R6 (return #1) NOPH MOVD R3, ret+32(FP) CMP R3, $-1 // compare result to -1 BNE done // retrieve errno and errno2 MOVD zosLibVec<>(SB), R8 ADD $(__errno), R8 LMG 0(R8), R5, R6 LE_CALL // balr R7, R6 __errno (return #3) NOPH MOVWZ 0(R3), R3 MOVD R3, err+48(FP)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 08 16:12:58 UTC 2024 - 11.2K bytes - Viewed (0) -
src/cmd/compile/internal/walk/assign.go
ir.CurFunc.SetWBPos(n.Pos()) } var clr ir.Nodes clrfn := mkcall(clrname, nil, &clr, hp, hn) clr.Append(clrfn) if hasPointers { // growslice will have cleared the new entries, so only // if growslice isn't called do we need to do the zeroing ourselves. nif.Body = append(nif.Body, clr...) } else { nifnz.Body = append(nifnz.Body, clr...) } typecheck.Stmts(nodes) walkStmtList(nodes)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 08 17:09:06 UTC 2024 - 20.3K bytes - Viewed (0) -
src/cmd/asm/internal/arch/ppc64.go
// with the core of the assembler. package arch import ( "cmd/internal/obj" "cmd/internal/obj/ppc64" ) func jumpPPC64(word string) bool { switch word { case "BC", "BCL", "BEQ", "BGE", "BGT", "BL", "BLE", "BLT", "BNE", "BR", "BVC", "BVS", "BDNZ", "BDZ", "CALL", "JMP": return true } return false } // IsPPC64CMP reports whether the op (as defined by an ppc64.A* constant) is
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 17 21:53:50 UTC 2024 - 2.2K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/anames.go
"ADDMEV", "ADDE", "ADDECC", "ADDEVCC", "ADDEV", "ADDZE", "ADDZECC", "ADDZEVCC", "ADDZEV", "ADDEX", "AND", "ANDCC", "ANDN", "ANDNCC", "ANDISCC", "BC", "BCL", "BEQ", "BGE", "BGT", "BLE", "BLT", "BNE", "BVC", "BVS", "BDNZ", "BDZ", "CMP", "CMPU", "CMPEQB", "CNTLZW", "CNTLZWCC", "CRAND", "CRANDN", "CREQV",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Apr 01 18:50:29 UTC 2024 - 6.7K bytes - Viewed (0) -
src/cmd/internal/obj/riscv/cpu.go
AMINU ASEXTB ASEXTH AZEXTH // 1.3: Bitwise Rotation (Zbb) AROL AROLW AROR ARORI ARORIW ARORW AORCB AREV8 // 1.5: Single-bit Instructions (Zbs) ABCLR ABCLRI ABEXT ABEXTI ABINV ABINVI ABSET ABSETI // The escape hatch. Inserts a single 32-bit word. AWORD
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Mar 20 14:19:33 UTC 2024 - 13.1K bytes - Viewed (0)