{2, 1073741816},          // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 g R23 R24 R25 R26 R27 R28 R29 R31
				{0, 4611686019501129724}, // SP R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 g R23 R24 R25 R26 R27 R28 R29 R31 SB
			},
			outputs: []outputInfo{
				{0, 1071644664}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R23 R24 R25 R26 R27 R28 R29 R31
			},

 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */

package org.gradle.plugins.ide.tooling.r28

import org.gradle.integtests.tooling.fixture.TargetGradleVersion
import org.gradle.integtests.tooling.fixture.ToolingApiSpecification
import org.gradle.integtests.tooling.fixture.WithOldConfigurationsSupport

 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */

package org.gradle.plugins.ide.tooling.r28


import org.gradle.integtests.tooling.fixture.ToolingApiSpecification
import org.gradle.integtests.tooling.fixture.WithOldConfigurationsSupport
import org.gradle.tooling.model.idea.IdeaModule

	MOVWZ	(R10)(R25),R27	// tab[6][crc>>8&0xFF]
	ADD 	$1024,R10,R10   // &tab[7]
	SLD	$2,R26,R26	// crc&0xFF*2
	XOR	R21,R27,R21	// xor done R27
	ADD     $8,R5           // p = p[8:]
	MOVWZ	(R10)(R26),R28	// tab[7][crc&0xFF]
	XOR	R21,R28,R21	// xor done R28
	MOVWZ	R21,R7		// crc for next round
	BDNZ 	loop
	ANDCC	$7,R6,R8	// any leftover bytes
	BEQ	done		// none --> done
	MOVD	R8,CTR		// byte count
	PCALIGN $16             // align short loop

	MOVD	$off,idx; \
	MOVWBR	(idx)(ptr), dst
#endif

#define M00 R18
#define M01 R19
#define M02 R20
#define M03 R24
#define M04 R25
#define M05 R26
#define M06 R27
#define M07 R28
#define M08 R29
#define M09 R21
#define M10 R11
#define M11 R8
#define M12 R7
#define M13 R12
#define M14 R23
#define M15 R10

#define ROUND1(a, b, c, d, index, const, shift) \
	ADD	$const, index, R9; \

// A brief recap of the arm64 calling convention.
// Arguments are passed in R0...R7, the rest is on stack.
// Callee-saved registers are: R19...R28.
// Temporary registers are: R9...R15
// SP must be 16-byte aligned.

// When calling racecalladdr, R9 is the call target address.

// The race ctx, ThreadState *thr below, is passed in R0 and loaded in racecalladdr.

	MOVD	R19, 200(R1)
	MOVD	R20, 208(R1)
	MOVD	R21, 216(R1)
	MOVD	R22, 224(R1)
	MOVD	R23, 232(R1)
	MOVD	R24, 240(R1)
	MOVD	R25, 248(R1)
	MOVD	R26, 256(R1)
	MOVD	R27, 264(R1)
	MOVD	R28, 272(R1)
	MOVD	R29, 280(R1)
	MOVD	g, 288(R1)
	MOVD	LR, R31
	MOVD	R31, 32(R1)
	CALL	runtime·debugCallCheck(SB)
	MOVD	40(R1), R22
	XOR	R0, R0
	CMP	R22, $0
	BEQ	good
	MOVD	48(R1), R22

	// R22 is g.
	MOVV	R23, 160(R3)
	MOVV	R24, 168(R3)
	MOVV	R25, 176(R3)
	MOVV	R26, 184(R3)
	// R27 already saved
	// R28 already saved.
	MOVV	R29, 192(R3)
	// R30 is tmp register.
	MOVV	R31, 200(R3)

	CALL	runtime·wbBufFlush(SB)

	MOVV	8(R3), R27
	MOVV	16(R3), R28
	MOVV	24(R3), R2
	MOVV	32(R3), R4
	MOVV	40(R3), R5
	MOVV	48(R3), R6
	MOVV	56(R3), R7
	MOVV	64(R3), R8
	MOVV	72(R3), R9

	// R21 already saved
	// R22 already saved.
	MOVW	R22, 84(R29)
	// R23 is tmp register.
	MOVW	R24, 88(R29)
	MOVW	R25, 92(R29)
	// R26 is reserved by kernel.
	// R27 is reserved by kernel.
	MOVW	R28, 96(R29)
	// R29 is SP.
	// R30 is g.
	// R31 is LR, which was saved by the prologue.

	CALL	runtime·wbBufFlush(SB)

	MOVW	4(R29), R20
	MOVW	8(R29), R21
	MOVW	12(R29), R3
	MOVW	16(R29), R4

	"R11", // REGCTXT for closures
	"R12",
	"R13", // REGTLS
	"R14",
	"R15",
	"R16",
	"R17",
	"R18",
	"R19",
	"R20",
	"R21",
	"R22",
	"R23",
	"R24",
	"R25",
	"R26",
	"R27",
	"R28",
	"R29",
	"g",   // REGG.  Using name "g" and setting Config.hasGReg makes it "just happen".
	"R31", // REGTMP

	"F0",
	"F1",
	"F2",
	"F3",
	"F4",
	"F5",
	"F6",
	"F7",
	"F8",
	"F9",