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Results 1 - 9 of 9 for REMVU (0.07 sec)
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src/cmd/internal/obj/mips/anames.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Aug 08 12:17:12 UTC 2023 - 1.4K bytes - Viewed (0) -
src/cmd/internal/obj/loong64/anames.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 02:04:54 UTC 2024 - 1.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/loong64enc1.s
MULHV R4, R5 // a5101e00 MULHV R4, R5, R6 // a6101e00 MULHVU R4, R5 // a5901e00 MULHVU R4, R5, R6 // a6901e00 REMV R4, R5 // a5902200 REMV R4, R5, R6 // a6902200 REMVU R4, R5 // a5902300 REMVU R4, R5, R6 // a6902300 DIVV R4, R5 // a5102200 DIVV R4, R5, R6 // a6102200 DIVVU R4, R5 // a5102300 DIVVU R4, R5, R6 // a6102300 MOVH R4, result+16(FP) // 64604029
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 02:04:54 UTC 2024 - 8.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/LOONG64.rules
(Mod64 x y) => (REMV x y) (Mod64u ...) => (REMVU ...) (Mod32 x y) => (REMV (SignExt32to64 x) (SignExt32to64 y)) (Mod32u x y) => (REMVU (ZeroExt32to64 x) (ZeroExt32to64 y)) (Mod16 x y) => (REMV (SignExt16to64 x) (SignExt16to64 y)) (Mod16u x y) => (REMVU (ZeroExt16to64 x) (ZeroExt16to64 y)) (Mod8 x y) => (REMV (SignExt8to64 x) (SignExt8to64 y)) (Mod8u x y) => (REMVU (ZeroExt8to64 x) (ZeroExt8to64 y))
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 21 19:26:25 UTC 2023 - 31.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 21 19:04:19 UTC 2023 - 25.2K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/mips64.s
DIVVU R16, R19 // 0270001f // LREM rreg ',' rreg // { // outcode(int($1), &$2, 0, &$4); // } REM R18, R22 // 02d2001a REMU R14, R9 // 012e001b REMV R8, R13 // 01a8001e REMVU R16, R19 // 0270001f // LSHW rreg ',' sreg ',' rreg // { // outcode(int($1), &$2, int($4), &$6); // } SLL R1, R2, R3 // 00221804 SLLV R10, R22, R21 // 0156a814 SRL R27, R6, R17 // 03668806
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Aug 08 12:17:12 UTC 2023 - 12.4K bytes - Viewed (0) -
src/runtime/sys_linux_loong64.s
RET // func usleep(usec uint32) TEXT runtimeĀ·usleep(SB),NOSPLIT,$16-4 MOVWU usec+0(FP), R7 MOVV $1000, R6 MULVU R6, R7, R7 MOVV $1000000000, R6 DIVVU R6, R7, R5 // ts->tv_sec REMVU R6, R7, R4 // ts->tv_nsec MOVV R5, 8(R3) MOVV R4, 16(R3) // nanosleep(&ts, 0) ADDV $8, R3, R4 MOVV R0, R5 MOVV $SYS_nanosleep, R11 SYSCALL RET // func gettid() uint32
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Aug 25 20:58:13 UTC 2023 - 14.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteLOONG64.go
v_1 := v.Args[1] v_0 := v.Args[0] // match: (REMVU _ (MOVVconst [1])) // result: (MOVVconst [0]) for { if v_1.Op != OpLOONG64MOVVconst || auxIntToInt64(v_1.AuxInt) != 1 { break } v.reset(OpLOONG64MOVVconst) v.AuxInt = int64ToAuxInt(0) return true } // match: (REMVU x (MOVVconst [c])) // cond: isPowerOfTwo64(c) // result: (ANDconst [c-1] x)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 21 19:26:25 UTC 2023 - 195.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/opGen.go
}, outputs: []outputInfo{ {0, 1071644664}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R23 R24 R25 R26 R27 R28 R29 R31 }, }, }, { name: "REMVU", argLen: 2, asm: loong64.AREMVU, reg: regInfo{ inputs: []inputInfo{ {0, 1073741816}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 g R23 R24 R25 R26 R27 R28 R29 R31
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 1M bytes - Viewed (0)