Search Options

Results per page
Sort
Preferred Languages
Advance

Results 1 - 10 of 15 for ADDVU (0.07 sec)

  1. src/cmd/asm/internal/asm/testdata/loong64enc2.s

    	ADDU	$65536, R4, R5		// 1e02001485781000
    	ADDU	$4096, R4, R5		// 3e00001485781000
    	ADDU	$65536, R4		// 1e02001484781000
    	ADDU	$4096, R4		// 3e00001484781000
    	ADDVU	$65536, R4, R5		// 1e02001485f81000
    	ADDVU	$4096, R4, R5		// 3e00001485f81000
    	ADDVU	$65536, R4		// 1e02001484f81000
    	ADDVU	$4096, R4		// 3e00001484f81000
    	OR	$65536, R4, R5		// 1e02001485781500
    	OR	$4096, R4, R5		// 3e00001485781500
    	OR	$65536, R4		// 1e02001484781500
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Apr 10 15:50:11 UTC 2023
    - 3K bytes
    - Viewed (0)
  2. src/runtime/memclr_mips64x.s

    	VMOVB	$0, W0
    
    	SGTU	$128, R2, R3
    	BEQ	R3, msa_large
    
    	AND	$15, R2, R5
    	XOR	R2, R5, R6
    	ADDVU	R1, R6
    
    msa_small:
    	VMOVB	W0, (R1)
    	ADDVU	$16, R1
    	SGTU	R6, R1, R3
    	BNE	R3, R0, msa_small
    	BEQ	R5, R0, done
    	VMOVB	W0, -16(R4)
    	JMP	done
    
    msa_large:
    	AND	$127, R2, R5
    	XOR	R2, R5, R6
    	ADDVU	R1, R6
    
    msa_large_loop:
    	VMOVB	W0, (R1)
    	VMOVB	W0, 16(R1)
    	VMOVB	W0, 32(R1)
    	VMOVB	W0, 48(R1)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat Nov 06 10:24:44 UTC 2021
    - 1.7K bytes
    - Viewed (0)
  3. src/internal/bytealg/compare_loong64.s

    	MOVV	8(R6), R17
    	ADDV	$16, R4
    	ADDV	$16, R6
    	SUBVU	$1, R14
    	BEQ	R16, R17, chunk16_loop
    	SUBV	$8, R4
    	SUBV	$8, R6
    
    byte_loop:
    	BEQ	R4, R12, samebytes
    	MOVBU	(R4), R8
    	ADDVU	$1, R4
    	MOVBU	(R6), R9
    	ADDVU	$1, R6
    	BEQ	R8, R9, byte_loop
    
    byte_cmp:
    	SGTU	R8, R9, R4 // R12 = 1 if (R8 > R9)
    	BNE	R0, R4, ret
    	MOVV	$-1, R4
    	JMP	ret
    
    samebytes:
    	SGTU	R5, R7, R8
    	SGTU	R7, R5, R9
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 13 15:04:25 UTC 2024
    - 1.7K bytes
    - Viewed (0)
  4. src/cmd/asm/internal/asm/testdata/loong64enc3.s

    	ADDU	$74565, R4, R5 			// 5e020014de178d0385781000
    	ADDU	$4097, R4 			// 3e000014de07800384781000
    	ADDU	$4097, R4, R5 			// 3e000014de07800385781000
    	ADDVU	$4097, R4			// 3e000014de07800384f81000
    	ADDVU	$4097, R4, R5 			// 3e000014de07800385f81000
    	ADDVU	$74565, R4			// 5e020014de178d0384f81000
    	ADDVU	$74565, R4, R5			// 5e020014de178d0385f81000
    	OR	$74565, R4			// 5e020014de178d0384781500
    	OR	$74565, R4, R5			// 5e020014de178d0385781500
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat May 14 23:57:43 UTC 2022
    - 6.3K bytes
    - Viewed (0)
  5. src/internal/bytealg/compare_mips64x.s

    	MOVV	8(R4), R14
    	ADDV	$16, R3
    	ADDV	$16, R4
    	SUBVU	$1, R10
    	BEQ	R13, R14, chunk16_loop
    	SUBV	$8, R3
    	SUBV	$8, R4
    
    byte_loop:
    	BEQ	R3, R8, samebytes
    	MOVBU	(R3), R6
    	ADDVU	$1, R3
    	MOVBU	(R4), R7
    	ADDVU	$1, R4
    	BEQ	R6, R7, byte_loop
    
    byte_cmp:
    	SGTU	R6, R7, R8 // R8 = 1 if (R6 > R7)
    	BNE	R0, R8, ret
    	MOVV	$-1, R8
    	JMP	ret
    
    samebytes:
    	SGTU	R1, R2, R6
    	SGTU	R2, R1, R7
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat Nov 06 10:24:44 UTC 2021
    - 1.7K bytes
    - Viewed (0)
  6. src/cmd/internal/obj/mips/anames.go

    	"TNE",
    	"WORD",
    	"WSBH",
    	"XOR",
    	"MOVV",
    	"MOVVL",
    	"MOVVR",
    	"SLLV",
    	"SRAV",
    	"SRLV",
    	"DIVV",
    	"DIVVU",
    	"REMV",
    	"REMVU",
    	"MULV",
    	"MULVU",
    	"ADDV",
    	"ADDVU",
    	"SUBV",
    	"SUBVU",
    	"DSBH",
    	"DSHD",
    	"TRUNCFV",
    	"TRUNCDV",
    	"TRUNCFW",
    	"TRUNCDW",
    	"MOVWU",
    	"MOVFV",
    	"MOVDV",
    	"MOVVF",
    	"MOVVD",
    	"VMOVB",
    	"VMOVH",
    	"VMOVW",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Aug 08 12:17:12 UTC 2023
    - 1.4K bytes
    - Viewed (0)
  7. src/cmd/internal/obj/loong64/anames.go

    	"MOVV",
    	"MOVVL",
    	"MOVVR",
    	"SLLV",
    	"SRAV",
    	"SRLV",
    	"ROTRV",
    	"DIVV",
    	"DIVVU",
    	"REMV",
    	"REMVU",
    	"MULV",
    	"MULVU",
    	"MULHV",
    	"MULHVU",
    	"ADDV",
    	"ADDVU",
    	"SUBV",
    	"SUBVU",
    	"TRUNCFV",
    	"TRUNCDV",
    	"TRUNCFW",
    	"TRUNCDW",
    	"MOVWU",
    	"MOVFV",
    	"MOVDV",
    	"MOVVF",
    	"MOVVD",
    	"AMSWAPB",
    	"AMSWAPH",
    	"AMSWAPW",
    	"AMSWAPV",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 02:04:54 UTC 2024
    - 1.9K bytes
    - Viewed (0)
  8. src/cmd/asm/internal/asm/testdata/mips64.s

    	ADDU	R13, R14, R19	// 01cd9821
    	ADDV	R5, R9, R10	// 0125502c
    	ADDVU	R13, R14, R19	// 01cd982d
    
    //	LADDW imm ',' sreg ',' rreg
    //	{
    //		outcode(int($1), &$2, int($4), &$6);
    //	}
    	ADD	$15176, R14, R9	// 21c93b48
    	ADD	$-9, R5, R8	// 20a8fff7
    	ADDU	$10, R9, R9	// 2529000a
    	ADDV	$15176, R14, R9	// 61c93b48
    	ADDV	$-9, R5, R8	// 60a8fff7
    	ADDVU	$10, R9, R9	// 6529000a
    
    //	LADDW rreg ',' rreg
    //	{
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Aug 08 12:17:12 UTC 2023
    - 12.4K bytes
    - Viewed (0)
  9. src/internal/runtime/atomic/atomic_loong64.s

    	MOVV	R7, R6
    	SC	R7, (R4)
    	BEQ	R7, -4(PC)
    	MOVW	R6, ret+16(FP)
    	DBAR
    	RET
    
    TEXT ·Xadd64(SB), NOSPLIT, $0-24
    	MOVV	ptr+0(FP), R4
    	MOVV	delta+8(FP), R5
    	DBAR
    	LLV	(R4), R6
    	ADDVU	R6, R5, R7
    	MOVV	R7, R6
    	SCV	R7, (R4)
    	BEQ	R7, -4(PC)
    	MOVV	R6, ret+16(FP)
    	DBAR
    	RET
    
    TEXT ·Xchg(SB), NOSPLIT, $0-20
    	MOVV	ptr+0(FP), R4
    	MOVW	new+8(FP), R5
    
    	DBAR
    	MOVV	R5, R6
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 25 19:53:03 UTC 2024
    - 6.3K bytes
    - Viewed (0)
  10. src/internal/runtime/atomic/atomic_mips64x.s

    // uint64 Xadd64(uint64 volatile *ptr, int64 delta)
    // Atomically:
    //	*val += delta;
    //	return *val;
    TEXT ·Xadd64(SB), NOSPLIT, $0-24
    	MOVV	ptr+0(FP), R2
    	MOVV	delta+8(FP), R3
    	SYNC
    	LLV	(R2), R1
    	ADDVU	R1, R3, R4
    	MOVV	R4, R1
    	SCV	R4, (R2)
    	BEQ	R4, -4(PC)
    	MOVV	R1, ret+16(FP)
    	SYNC
    	RET
    
    // uint32 Xchg(ptr *uint32, new uint32)
    // Atomically:
    //	old := *ptr;
    //	*ptr = new;
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat May 11 21:29:34 UTC 2024
    - 7.2K bytes
    - Viewed (0)
Back to top