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Results 1 - 9 of 9 for R27 (0.02 sec)

  1. src/runtime/asm_arm64.s

    // Caution: ugly multiline assembly macros in your future!
    
    #define DISPATCH(NAME,MAXSIZE)		\
    	MOVD	$MAXSIZE, R27;		\
    	CMP	R27, R16;		\
    	BGT	3(PC);			\
    	MOVD	$NAME(SB), R27;	\
    	B	(R27)
    // Note: can't just "B NAME(SB)" - bad inlining results.
    
    TEXT ·reflectcall(SB), NOSPLIT|NOFRAME, $0-48
    	MOVWU	frameSize+32(FP), R16
    	DISPATCH(runtime·call16, 16)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat May 11 20:38:24 UTC 2024
    - 43.4K bytes
    - Viewed (0)
  2. src/math/big/arith_ppc64x.s

    	ADDZE R20, R24		// R24 = x[i] + CA
    	ADDZE R21, R25		// R25 = x[i+1] + CA
    	ADDZE R22, R26		// R26 = x[i+2] + CA
    	ADDZE R23, R27		// R27 = x[i+3] + CA
    	MOVD  R24, 8(R10)	// z[i]
    	MOVD  R25, 16(R10)	// z[i+1]
    	MOVD  R26, 24(R10)	// z[i+2]
    	MOVDU R27, 32(R10)	// z[i+3]
    	ADD   $-4, R11		// R11 = z_len - 4
    	BDNZ  loop
    
    	// We may have some elements to read
    	CMP R11, $0
    	BEQ final
    
    tail:
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 18:17:17 UTC 2024
    - 16.8K bytes
    - Viewed (0)
  3. src/runtime/race_arm64.s

    	// can be executed on g0. Second, it is called frequently, so will
    	// benefit from this fast path.
    	CBNZ	R0, rest
    	MOVD	g, R13
    #ifdef TLS_darwin
    	MOVD	R27, R12 // save R27 a.k.a. REGTMP (callee-save in C). load_g clobbers it
    #endif
    	load_g
    #ifdef TLS_darwin
    	MOVD	R12, R27
    #endif
    	MOVD	g_m(g), R0
    	MOVD	m_p(R0), R0
    	MOVD	p_raceprocctx(R0), R0
    	MOVD	R0, (R1)
    	MOVD	R13, g
    	JMP	(LR)
    rest:
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri May 17 18:37:29 UTC 2024
    - 15.5K bytes
    - Viewed (0)
  4. src/hash/crc32/crc32_ppc64le.s

    	RLDICL	$56,R7,$56,R25	// crc>>8
    	ADD	$1024,R10,R10	// &tab[6]
    	SLD	$2,R25,R25	// crc>>8&FF*2
    	MOVBZ   R7,R26          // crc&0xFF
    	MOVWZ	(R10)(R25),R27	// tab[6][crc>>8&0xFF]
    	ADD 	$1024,R10,R10   // &tab[7]
    	SLD	$2,R26,R26	// crc&0xFF*2
    	XOR	R21,R27,R21	// xor done R27
    	ADD     $8,R5           // p = p[8:]
    	MOVWZ	(R10)(R26),R28	// tab[7][crc&0xFF]
    	XOR	R21,R28,R21	// xor done R28
    	MOVWZ	R21,R7		// crc for next round
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 06 12:09:50 UTC 2024
    - 13.1K bytes
    - Viewed (0)
  5. platforms/ide/tooling-api/src/crossVersionTest/groovy/org/gradle/integtests/tooling/r27/TestLauncherCrossVersionSpec.groovy

     * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
     * See the License for the specific language governing permissions and
     * limitations under the License.
     */
    
    package org.gradle.integtests.tooling.r27
    
    
    import org.gradle.integtests.tooling.TestLauncherSpec
    import org.gradle.integtests.tooling.fixture.TargetGradleVersion
    import org.gradle.tooling.BuildException
    import org.gradle.tooling.TestExecutionException
    Registered: Wed Jun 12 18:38:38 UTC 2024
    - Last Modified: Thu May 16 10:10:39 UTC 2024
    - 10.9K bytes
    - Viewed (0)
  6. src/runtime/asm_ppc64x.s

    	MOVD	R18, 192(R1)
    	MOVD	R19, 200(R1)
    	MOVD	R20, 208(R1)
    	MOVD	R21, 216(R1)
    	MOVD	R22, 224(R1)
    	MOVD	R23, 232(R1)
    	MOVD	R24, 240(R1)
    	MOVD	R25, 248(R1)
    	MOVD	R26, 256(R1)
    	MOVD	R27, 264(R1)
    	MOVD	R28, 272(R1)
    	MOVD	R29, 280(R1)
    	MOVD	g, 288(R1)
    	MOVD	LR, R31
    	MOVD	R31, 32(R1)
    	CALL	runtime·debugCallCheck(SB)
    	MOVD	40(R1), R22
    	XOR	R0, R0
    	CMP	R22, $0
    	BEQ	good
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 18:17:17 UTC 2024
    - 45.4K bytes
    - Viewed (0)
  7. src/runtime/asm_loong64.s

    	MOVV	R21, 152(R3)
    	// R22 is g.
    	MOVV	R23, 160(R3)
    	MOVV	R24, 168(R3)
    	MOVV	R25, 176(R3)
    	MOVV	R26, 184(R3)
    	// R27 already saved
    	// R28 already saved.
    	MOVV	R29, 192(R3)
    	// R30 is tmp register.
    	MOVV	R31, 200(R3)
    
    	CALL	runtime·wbBufFlush(SB)
    
    	MOVV	8(R3), R27
    	MOVV	16(R3), R28
    	MOVV	24(R3), R2
    	MOVV	32(R3), R4
    	MOVV	40(R3), R5
    	MOVV	48(R3), R6
    	MOVV	56(R3), R7
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 13 15:04:25 UTC 2024
    - 26.5K bytes
    - Viewed (0)
  8. src/cmd/compile/internal/ssa/_gen/PPC64Ops.go

    	"R10",
    	"R11", // REGCTXT for closures
    	"R12",
    	"R13", // REGTLS
    	"R14",
    	"R15",
    	"R16",
    	"R17",
    	"R18",
    	"R19",
    	"R20",
    	"R21",
    	"R22",
    	"R23",
    	"R24",
    	"R25",
    	"R26",
    	"R27",
    	"R28",
    	"R29",
    	"g",   // REGG.  Using name "g" and setting Config.hasGReg makes it "just happen".
    	"R31", // REGTMP
    
    	"F0",
    	"F1",
    	"F2",
    	"F3",
    	"F4",
    	"F5",
    	"F6",
    	"F7",
    	"F8",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 19:59:38 UTC 2024
    - 43.8K bytes
    - Viewed (0)
  9. src/runtime/asm_mipsx.s

    	MOVW	R19, 76(R29)
    	MOVW	R20, 80(R29)
    	// R21 already saved
    	// R22 already saved.
    	MOVW	R22, 84(R29)
    	// R23 is tmp register.
    	MOVW	R24, 88(R29)
    	MOVW	R25, 92(R29)
    	// R26 is reserved by kernel.
    	// R27 is reserved by kernel.
    	MOVW	R28, 96(R29)
    	// R29 is SP.
    	// R30 is g.
    	// R31 is LR, which was saved by the prologue.
    
    	CALL	runtime·wbBufFlush(SB)
    
    	MOVW	4(R29), R20
    	MOVW	8(R29), R21
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 06 11:46:29 UTC 2024
    - 26.3K bytes
    - Viewed (0)
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