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Results 1 - 8 of 8 for R23 (0.03 sec)

  1. src/math/big/arith_ppc64x.s

    	MOVD    24(R8), R22       // R22 = x[i+2]
    	MOVDU   32(R8), R23       // R23 = x[i+3]
    	MULLD   R9, R20, R24      // R24 = z0[i]
    	MULHDU  R9, R20, R20      // R20 = z1[i]
    	ADDC    R4, R24           // R24 = z0[i] + c
    	MULLD   R9, R21, R25
    	MULHDU  R9, R21, R21
    	ADDE    R20, R25
    	MULLD   R9, R22, R26
    	MULHDU  R9, R22, R22
    	MULLD   R9, R23, R27
    	MULHDU  R9, R23, R23
    	ADDE    R21, R26
    	MOVD    R24, 8(R10)       // z[i]
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 18:17:17 UTC 2024
    - 16.8K bytes
    - Viewed (0)
  2. src/runtime/asm_mipsx.s

    	MOVW	R2, 104(R29)
    retry:
    	MOVW	g_m(g), R1
    	MOVW	m_p(R1), R1
    	MOVW	(p_wbBuf+wbBuf_next)(R1), R2
    	MOVW	(p_wbBuf+wbBuf_end)(R1), R23 // R23 is linker temp register
    	// Increment wbBuf.next position.
    	ADD	R25, R2
    	// Is the buffer full?
    	SGTU	R2, R23, R23
    	BNE	R23, flush
    	// Commit to the larger buffer.
    	MOVW	R2, (p_wbBuf+wbBuf_next)(R1)
    	// Make return value (the original next position)
    	SUB	R25, R2, R25
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 06 11:46:29 UTC 2024
    - 26.3K bytes
    - Viewed (0)
  3. src/runtime/asm_loong64.s

    TEXT runtime·panicSliceAlen<ABIInternal>(SB),NOSPLIT,$0-16
    	MOVV	R21, R4
    	MOVV	R23, R5
    	JMP	runtime·goPanicSliceAlen<ABIInternal>(SB)
    TEXT runtime·panicSliceAlenU<ABIInternal>(SB),NOSPLIT,$0-16
    	MOVV	R21, R4
    	MOVV	R23, R5
    	JMP	runtime·goPanicSliceAlenU<ABIInternal>(SB)
    TEXT runtime·panicSliceAcap<ABIInternal>(SB),NOSPLIT,$0-16
    	MOVV	R21, R4
    	MOVV	R23, R5
    	JMP	runtime·goPanicSliceAcap<ABIInternal>(SB)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 13 15:04:25 UTC 2024
    - 26.5K bytes
    - Viewed (0)
  4. src/hash/crc32/crc32_ppc64le.s

    	SLD	$2,R19,R19	// p[5]*4:1
    	MOVWZ	(R10)(R18),R22	// tab[1][p[6]]
    	ADD	$1024,R10,R10	// tab[2]
    	XOR	R21,R22,R21	// xor done R22
    	CLRLSLDI $56,R9,$2,R20
    	MOVWZ	(R10)(R19),R23	// tab[2][p[5]]
    	ADD	$1024,R10,R10	// &tab[3]
    	XOR	R21,R23,R21	// xor done R23
    	MOVWZ	(R10)(R20),R24	// tab[3][p[4]]
    	ADD 	$1024,R10,R10   // &tab[4]
    	XOR	R21,R24,R21	// xor done R24
    	MOVWZ	(R10)(R8),R25	// tab[4][crc>>24]
    	RLDICL	$48,R7,$56,R24	// crc>>16&0xFF
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 06 12:09:50 UTC 2024
    - 13.1K bytes
    - Viewed (0)
  5. src/runtime/asm_ppc64x.s

    	XOR	R0, R0
    	CMP	R22, $0
    	BEQ	good
    	MOVD	48(R1), R22
    	MOVD	$8, R20
    	TW	$31, R0, R0
    
    	BR	restore
    
    good:
    #define DEBUG_CALL_DISPATCH(NAME,MAXSIZE)	\
    	MOVD	$MAXSIZE, R23;			\
    	CMP	R26, R23;			\
    	BGT	5(PC);				\
    	MOVD	$NAME(SB), R26;			\
    	MOVD	R26, 32(R1);			\
    	CALL	runtime·debugCallWrap(SB);	\
    	BR	restore
    
    	// the argument frame size
    	MOVD	128(R1), R26
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 18:17:17 UTC 2024
    - 45.4K bytes
    - Viewed (0)
  6. src/runtime/asm_arm64.s

    	STP	(R12, R13), 11*8(RSP)
    	STP	(R14, R15), 13*8(RSP)
    	// R16, R17 may be clobbered by linker trampoline
    	// R18 is unused.
    	STP	(R19, R20), 15*8(RSP)
    	STP	(R21, R22), 17*8(RSP)
    	STP	(R23, R24), 19*8(RSP)
    	STP	(R25, R26), 21*8(RSP)
    	// R27 is temp register.
    	// R28 is g.
    	// R29 is frame pointer (unused).
    	// R30 is LR, which was saved by the prologue.
    	// R31 is SP.
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat May 11 20:38:24 UTC 2024
    - 43.4K bytes
    - Viewed (0)
  7. src/cmd/internal/obj/ppc64/obj9.go

    				// if(g->panic != nil && g->panic->argp == FP) g->panic->argp = bottom-of-frame
    				//
    				//	MOVD g_panic(g), R22
    				//	CMP R22, $0
    				//	BEQ end
    				//	MOVD panic_argp(R22), R23
    				//	ADD $(autosize+8), R1, R24
    				//	CMP R23, R24
    				//	BNE end
    				//	ADD $8, R1, R25
    				//	MOVD R25, panic_argp(R22)
    				// end:
    				//	NOP
    				//
    				// The NOP is needed to give the jumps somewhere to land.
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 18:17:17 UTC 2024
    - 40.8K bytes
    - Viewed (0)
  8. src/cmd/compile/internal/ssa/_gen/PPC64Ops.go

    	"R5",
    	"R6",
    	"R7",
    	"R8",
    	"R9",
    	"R10",
    	"R11", // REGCTXT for closures
    	"R12",
    	"R13", // REGTLS
    	"R14",
    	"R15",
    	"R16",
    	"R17",
    	"R18",
    	"R19",
    	"R20",
    	"R21",
    	"R22",
    	"R23",
    	"R24",
    	"R25",
    	"R26",
    	"R27",
    	"R28",
    	"R29",
    	"g",   // REGG.  Using name "g" and setting Config.hasGReg makes it "just happen".
    	"R31", // REGTMP
    
    	"F0",
    	"F1",
    	"F2",
    	"F3",
    	"F4",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 19:59:38 UTC 2024
    - 43.8K bytes
    - Viewed (0)
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