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Results 1 - 5 of 5 for SRLI (0.03 sec)

  1. src/cmd/compile/internal/ssa/rewriteRISCV64latelower.go

    		return true
    	}
    	return false
    }
    func rewriteValueRISCV64latelower_OpRISCV64SRLI(v *Value) bool {
    	v_0 := v.Args[0]
    	b := v.Block
    	typ := &b.Func.Config.Types
    	// match: (SRLI [c] (MOVBUreg x))
    	// cond: c < 8
    	// result: (SRLI [56+c] (SLLI <typ.UInt64> [56] x))
    	for {
    		c := auxIntToInt64(v.AuxInt)
    		if v_0.Op != OpRISCV64MOVBUreg {
    			break
    		}
    		x := v_0.Args[0]
    		if !(c < 8) {
    			break
    		}
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Jan 19 22:42:34 UTC 2023
    - 5.1K bytes
    - Viewed (0)
  2. src/cmd/compile/internal/ssa/_gen/RISCV64latelower.rules

    (SRLI [c] (MOVBUreg x)) && c <   8 => (SRLI [56+c] (SLLI <typ.UInt64> [56] x))
    (SRLI [c] (MOVHUreg x)) && c <  16 => (SRLI [48+c] (SLLI <typ.UInt64> [48] x))
    (SRLI [c] (MOVWUreg x)) && c <  32 => (SRLI [32+c] (SLLI <typ.UInt64> [32] x))
    (SLLI [c] (MOVBUreg x)) && c <= 56 => (SRLI [56-c] (SLLI <typ.UInt64> [56] x))
    (SLLI [c] (MOVHUreg x)) && c <= 48 => (SRLI [48-c] (SLLI <typ.UInt64> [48] x))
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Oct 24 03:45:10 UTC 2022
    - 980 bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/testdata/riscv64error.s

    	SLLI	$64, X5, X6			// ERROR "immediate out of range 0 to 63"
    	SRLI	$64, X5, X6			// ERROR "immediate out of range 0 to 63"
    	SRAI	$64, X5, X6			// ERROR "immediate out of range 0 to 63"
    	RORI	$-1, X5, X6			// ERROR "immediate out of range 0 to 63"
    	SLLI	$-1, X5, X6			// ERROR "immediate out of range 0 to 63"
    	SRLI	$-1, X5, X6			// ERROR "immediate out of range 0 to 63"
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sun Apr 07 03:32:27 UTC 2024
    - 2.8K bytes
    - Viewed (0)
  4. test/codegen/rotate.go

    	// amd64:"ROLW\t[$]7"
    	// riscv64: "OR","SLLI","SRLI",-"AND"
    	a += x<<7 | x>>9
    
    	// amd64:`ROLW\t[$]8`
    	// riscv64: "OR","SLLI","SRLI",-"AND"
    	a += x<<8 + x>>8
    
    	// amd64:"ROLW\t[$]9"
    	// riscv64: "OR","SLLI","SRLI",-"AND"
    	a += x<<9 ^ x>>7
    
    	return a
    }
    
    func rot8(x uint8) uint8 {
    	var a uint8
    
    	// amd64:"ROLB\t[$]5"
    	// riscv64: "OR","SLLI","SRLI",-"AND"
    	a += x<<5 | x>>3
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Mar 07 14:57:07 UTC 2024
    - 6K bytes
    - Viewed (0)
  5. src/cmd/internal/obj/riscv/anames.go

    package riscv
    
    import "cmd/internal/obj"
    
    var Anames = []string{
    	obj.A_ARCHSPECIFIC: "ADDI",
    	"SLTI",
    	"SLTIU",
    	"ANDI",
    	"ORI",
    	"XORI",
    	"SLLI",
    	"SRLI",
    	"SRAI",
    	"LUI",
    	"AUIPC",
    	"ADD",
    	"SLT",
    	"SLTU",
    	"AND",
    	"OR",
    	"XOR",
    	"SLL",
    	"SRL",
    	"SUB",
    	"SRA",
    	"JAL",
    	"JALR",
    	"BEQ",
    	"BNE",
    	"BLT",
    	"BLTU",
    	"BGE",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Mar 20 14:19:33 UTC 2024
    - 2.9K bytes
    - Viewed (0)
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