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Results 1 - 10 of 15 for ORR (0.03 sec)

  1. src/runtime/memmove_arm.s

    _bu16loop:
    	CMP	TMP, TE
    	BLS	_bu1tail
    
    	MOVW	BR0<<LSHIFT, BW3
    	MOVM.DB.W (FROM), [BR0-BR3]
    	ORR	BR3>>RSHIFT, BW3
    
    	MOVW	BR3<<LSHIFT, BW2
    	ORR	BR2>>RSHIFT, BW2
    
    	MOVW	BR2<<LSHIFT, BW1
    	ORR	BR1>>RSHIFT, BW1
    
    	MOVW	BR1<<LSHIFT, BW0
    	ORR	BR0>>RSHIFT, BW0
    
    	MOVM.DB.W [BW0-BW3], (TE)
    	B	_bu16loop
    
    _bu1tail:
    	MOVW	savedts-4(SP), TS
    	ADD	OFFSET, FROM
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Jun 04 07:25:06 UTC 2020
    - 5.9K bytes
    - Viewed (0)
  2. src/crypto/sha1/sha1block_arm.s

    	// w[i] = p[j]<<24 | p[j+1]<<16 | p[j+2]<<8 | p[j+3]
    	// e += w[i]
    #define LOAD(Re) \
    	MOVBU	2(Rdata), Rt0 ; \
    	MOVBU	3(Rdata), Rt1 ; \
    	MOVBU	1(Rdata), Rt2 ; \
    	ORR	Rt0<<8, Rt1, Rt0	    ; \
    	MOVBU.P	4(Rdata), Rt1 ; \
    	ORR	Rt2<<16, Rt0, Rt0	    ; \
    	ORR	Rt1<<24, Rt0, Rt0	    ; \
    	MOVW.P	Rt0, 4(Rw)		    ; \
    	ADD	Rt0, Re, Re
    
    	// tmp := w[(i-3)&0xf] ^ w[(i-8)&0xf] ^ w[(i-14)&0xf] ^ w[(i)&0xf]
    	// w[i&0xf] = tmp<<1 | tmp>>(32-1)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 5.6K bytes
    - Viewed (0)
  3. src/math/modf_arm64.s

    // func archModf(f float64) (int float64, frac float64)
    TEXT ·archModf(SB),NOSPLIT,$0
    	MOVD	f+0(FP), R0
    	FMOVD	R0, F0
    	FRINTZD	F0, F1
    	FMOVD	F1, int+8(FP)
    	FSUBD	F1, F0
    	FMOVD	F0, R1
    	AND	$(1<<63), R0
    	ORR	R0, R1 // must have same sign
    	MOVD	R1, frac+16(FP)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Apr 15 15:48:19 UTC 2021
    - 447 bytes
    - Viewed (0)
  4. src/cmd/internal/obj/arm/anames.go

    package arm
    
    import "cmd/internal/obj"
    
    var Anames = []string{
    	obj.A_ARCHSPECIFIC: "AND",
    	"EOR",
    	"SUB",
    	"RSB",
    	"ADD",
    	"ADC",
    	"SBC",
    	"RSC",
    	"TST",
    	"TEQ",
    	"CMP",
    	"CMN",
    	"ORR",
    	"BIC",
    	"MVN",
    	"BEQ",
    	"BNE",
    	"BCS",
    	"BHS",
    	"BCC",
    	"BLO",
    	"BMI",
    	"BPL",
    	"BVS",
    	"BVC",
    	"BHI",
    	"BLS",
    	"BGE",
    	"BLT",
    	"BGT",
    	"BLE",
    	"MOVWD",
    	"MOVWF",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Oct 16 15:58:33 UTC 2019
    - 1.4K bytes
    - Viewed (0)
  5. src/internal/runtime/atomic/atomic_arm64.s

    #ifndef GOARM64_LSE
    	MOVBU	internal∕cpu·ARM64+const_offsetARM64HasATOMICS(SB), R4
    	CBZ 	R4, load_store_loop
    #endif
    	LDORALB	R1, (R0), R2
    	RET
    #ifndef GOARM64_LSE
    load_store_loop:
    	LDAXRB	(R0), R2
    	ORR	R1, R2
    	STLXRB	R2, (R0), R3
    	CBNZ	R3, load_store_loop
    	RET
    #endif
    
    // func And(addr *uint32, v uint32)
    TEXT ·And(SB), NOSPLIT, $0-12
    	MOVD	ptr+0(FP), R0
    	MOVW	val+8(FP), R1
    #ifndef GOARM64_LSE
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 25 19:53:03 UTC 2024
    - 9K bytes
    - Viewed (0)
  6. src/math/big/arith_arm.s

    	ADD	$4, R1	// stop one word early
    	MOVW	$32, R4
    	SUB	R3, R4
    	MOVW	$0, R7
    
    	MOVW.W	-4(R2), R6
    	MOVW	R6<<R3, R7
    	MOVW	R6>>R4, R6
    	MOVW	R6, c+28(FP)
    	B E7
    
    L7:
    	MOVW.W	-4(R2), R6
    	ORR	R6>>R4, R7
    	MOVW.W	R7, -4(R5)
    	MOVW	R6<<R3, R7
    E7:
    	TEQ	R1, R5
    	BNE	L7
    
    	MOVW	R7, -4(R5)
    	RET
    
    Y7:	// copy loop, because shift 0 == shift 32
    	MOVW.W	-4(R2), R6
    	MOVW.W	R6, -4(R5)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:27 UTC 2023
    - 4K bytes
    - Viewed (0)
  7. src/math/exp_arm64.s

    	AND	$FracMask, R0, R2	// fraction
    	LSR	$52, R0, R5	// exponent
    	ADD	R1, R5		// R1 = int(k)
    	CMP	$1, R5
    	BGE	normal
    	ADD	$52, R5		// denormal
    	MOVD	$C1, R8
    	FMOVD	R8, F1		// m = 2**-52
    normal:
    	ORR	R5<<52, R2, R0
    	FMOVD	R0, F0
    	FMULD	F1, F0		// return m * x
    	FMOVD	F0, ret+8(FP)
    	RET
    nearzero:
    	FADDD	F1, F0
    isNaN:
    	FMOVD	F0, ret+8(FP)
    	RET
    underflow:
    	MOVD	ZR, ret+8(FP)
    	RET
    overflow:
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Apr 15 15:48:19 UTC 2021
    - 5.4K bytes
    - Viewed (0)
  8. src/runtime/time_windows_arm.s

    	MULLU	R1,R3,(R6,R5)		// R7:R6:R5 = R2:R1 * R3
    	MOVW	$0,R7
    	MULALU	R2,R3,(R7,R6)
    
    	// unscale by discarding low 32 bits, shifting the rest by 29
    	MOVW	R6>>29,R6		// R7:R6 = (R7:R6:R5 >> 61)
    	ORR	R7<<3,R6
    	MOVW	R7>>29,R7
    
    	// subtract (10**9 * sec) from nsec to get nanosecond remainder
    	MOVW	$1000000000, R5	// 10**9
    	MULLU	R6,R5,(R9,R8)   // R9:R8 = R7:R6 * R5
    	MULA	R7,R5,R9,R9
    	SUB.S	R8,R1		// R2:R1 -= R9:R8
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Sep 07 17:19:45 UTC 2023
    - 2K bytes
    - Viewed (0)
  9. src/cmd/internal/obj/arm64/anames.go

    	"MSUB",
    	"MSUBW",
    	"MUL",
    	"MULW",
    	"MVN",
    	"MVNW",
    	"NEG",
    	"NEGS",
    	"NEGSW",
    	"NEGW",
    	"NGC",
    	"NGCS",
    	"NGCSW",
    	"NGCW",
    	"NOOP",
    	"ORN",
    	"ORNW",
    	"ORR",
    	"ORRW",
    	"PRFM",
    	"PRFUM",
    	"RBIT",
    	"RBITW",
    	"REM",
    	"REMW",
    	"REV",
    	"REV16",
    	"REV16W",
    	"REV32",
    	"REVW",
    	"ROR",
    	"RORW",
    	"SBC",
    	"SBCS",
    	"SBCSW",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 18 01:40:37 UTC 2023
    - 5.4K bytes
    - Viewed (0)
  10. test/codegen/bitfield.go

    //go:nosplit
    func shift_no_cmp(x int) int {
    	// arm64:`LSL\t[$]17`,-`CMP`
    	// mips64:`SLLV\t[$]17`,-`SGT`
    	return x << 17
    }
    
    func rev16(c uint64) (uint64, uint64, uint64) {
    	// arm64:`REV16`,-`AND`,-`LSR`,-`AND`,-`ORR\tR[0-9]+<<8`
    	b1 := ((c & 0xff00ff00ff00ff00) >> 8) | ((c & 0x00ff00ff00ff00ff) << 8)
    	// arm64:-`ADD\tR[0-9]+<<8`
    	b2 := ((c & 0xff00ff00ff00ff00) >> 8) + ((c & 0x00ff00ff00ff00ff) << 8)
    	// arm64:-`EOR\tR[0-9]+<<8`
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Aug 23 06:11:32 UTC 2022
    - 9.6K bytes
    - Viewed (0)
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