// arm64:"FMSUBS"
	// riscv64:"FNMSUBS\t"
	return z - x*y
}

func FusedAdd64(x, y, z float64) float64 {
	// s390x:"FMADD\t"
	// ppc64x:"FMADD\t"
	// arm64:"FMADDD"
	// riscv64:"FMADDD\t"
	return x*y + z
}

func FusedSub64_a(x, y, z float64) float64 {
	// s390x:"FMSUB\t"
	// ppc64x:"FMSUB\t"
	// riscv64:"FMSUBD\t"
	return x*y - z
}

	MOVD    $sincoss2<>+0(SB), R2
	FMOVD   0(R2), F7
	WFMADB  V6, V3, V7, V3
	MOVD    $sincoss3<>+0(SB), R2
	FMADD   F5, F4, F0
	FMOVD   0(R2), F4
	MOVD    $sincoss1<>+0(SB), R2
	FMADD   F1, F6, F4
	FMOVD   0(R2), F1
	FMADD   F3, F2, F1
	FMUL    F0, F2
	WFMADB  V6, V4, V1, V6
	TMLL	R1, $2
	FMADD   F6, F2, F0
	BNE     L34
	FMOVD   F0, ret+8(FP)
	RET

L33:
	MOVD    $sincosxnan<>+0(SB), R1

	WFMDB   V4, V4, V6
	WFMADB  V4, V1, V7, V1
	WFMADB  V2, V3, V4, V2
	WFMADB  V1, V6, V5, V1
	FMOVD   56(R5), F3
	FMOVD   48(R5), F5
	WFMADB  V4, V5, V3, V4
	FMOVD   40(R5), F3
	FMADD   F1, F6, F4
	FMOVD   32(R5), F1
	FMADD   F3, F2, F1
	ANDW    $0xFFFFFF00, R1
	WFMADB  V6, V4, V1, V6
	FMOVD   24(R5), F3
	ORW $0x45000000, R1
	WFMADB  V2, V6, V3, V6
	VLVGF   $0, R1, V4
	LDEBR   F4, F4

	sink64[3] = math.Copysign(-1, c)
}

func fma(x, y, z float64) float64 {
	// amd64/v3:-".*x86HasFMA"
	// amd64:"VFMADD231SD"
	// arm/6:"FMULAD"
	// arm64:"FMADDD"
	// s390x:"FMADD"
	// ppc64x:"FMADD"
	// riscv64:"FMADDD"
	return math.FMA(x, y, z)
}

func fms(x, y, z float64) float64 {
	// riscv64:"FMSUBD"
	return math.FMA(x, y, -z)
}

func fnms(x, y, z float64) float64 {

	"EQV",
	"EQVCC",
	"EXTSB",
	"EXTSBCC",
	"EXTSH",
	"EXTSHCC",
	"FABS",
	"FABSCC",
	"FADD",
	"FADDCC",
	"FADDS",
	"FADDSCC",
	"FCMPO",
	"FCMPU",
	"FCTIW",
	"FCTIWCC",
	"FCTIWZ",
	"FCTIWZCC",
	"FDIV",
	"FDIVCC",
	"FDIVS",
	"FDIVSCC",
	"FMADD",
	"FMADDCC",
	"FMADDS",
	"FMADDSCC",
	"FMOVD",
	"FMOVDCC",
	"FMOVDU",
	"FMOVS",
	"FMOVSU",
	"FMOVSX",
	"FMOVSZ",

	FMOVD	88(R5), F6
	FMOVD	0(R1), F4
	WFMSDB	V0, V6, V4, V6
	FMOVD	80(R5), F1
	FADD	F6, F4
	FMOVD	72(R5), F2
	FMSUB	F1, F4, F0
	FMOVD	64(R5), F3
	WFMADB	V4, V2, V0, V2
	FMOVD	56(R5), F1
	WFMADB	V4, V3, V2, V4
	FMUL	F2, F2
	VLEG	$0, 48(R5), V18
	LGDR	F6, R1
	FMOVD	40(R5), F5
	FMOVD	32(R5), F3
	FMADD	F1, F2, F3
	FMOVD	24(R5), F1
	FMOVD	16(R5), F7
	FMOVD	8(R5), F0
	WFMADB	V2, V7, V1, V7

	"RNSBGT",
	"RXSBGT",
	"ROSBGT",
	"RISBG",
	"RISBGN",
	"RISBGZ",
	"RISBGNZ",
	"RISBHG",
	"RISBLG",
	"RISBHGZ",
	"RISBLGZ",
	"FABS",
	"FADD",
	"FADDS",
	"FCMPO",
	"FCMPU",
	"CEBR",
	"FDIV",
	"FDIVS",
	"FMADD",
	"FMADDS",
	"FMOVD",
	"FMOVS",
	"FMSUB",
	"FMSUBS",
	"FMUL",
	"FMULS",
	"FNABS",
	"FNEG",
	"FNEGS",
	"LEDBR",
	"LDEBR",
	"LPDFR",
	"LNDFR",

(2) MADD, MADDW, MSUB, MSUBW, SMADDL, SMSUBL, UMADDL, UMSUBL <Rm>, <Ra>, <Rn>, <Rd>

Examples:

	MADD R2, R30, R22, R6       <=>    madd x6, x22, x2, x30
	SMSUBL R10, R3, R17, R27    <=>    smsubl x27, w17, w10, x3

(3) FMADDD, FMADDS, FMSUBD, FMSUBS, FNMADDD, FNMADDS, FNMSUBD, FNMSUBS <Fm>, <Fa>, <Fn>, <Fd>

Examples:

	FMADDD F30, F20, F3, F29    <=>    fmadd d29, d3, d30, d20

	"FMVSX",
	"FMVXW",
	"FMVWX",
	"FEQS",
	"FLTS",
	"FLES",
	"FCLASSS",
	"FLD",
	"FSD",
	"FADDD",
	"FSUBD",
	"FMULD",
	"FDIVD",
	"FMIND",
	"FMAXD",
	"FSQRTD",
	"FMADDD",
	"FMSUBD",
	"FNMADDD",
	"FNMSUBD",
	"FCVTWD",
	"FCVTLD",
	"FCVTDW",
	"FCVTDL",
	"FCVTWUD",
	"FCVTLUD",
	"FCVTDWU",
	"FCVTDLU",
	"FCVTSD",
	"FCVTDS",
	"FSGNJD",

	"FCVTZSD",
	"FCVTZSDW",
	"FCVTZSS",
	"FCVTZSSW",
	"FCVTZUD",
	"FCVTZUDW",
	"FCVTZUS",
	"FCVTZUSW",
	"FDIVD",
	"FDIVS",
	"FLDPD",
	"FLDPQ",
	"FLDPS",
	"FMADDD",
	"FMADDS",
	"FMAXD",
	"FMAXNMD",
	"FMAXNMS",
	"FMAXS",
	"FMIND",
	"FMINNMD",
	"FMINNMS",
	"FMINS",
	"FMOVD",
	"FMOVQ",
	"FMOVS",
	"FMSUBD",
	"FMSUBS",
	"FMULD",
	"FMULS",