JMP	foo+4(SB)
	JCS	2(PC)
	JMP	bar<>+4(SB)
	JCS	2(PC)
	JMP	bar<>+4(SB)(R11*4)
	JCS	2(PC)
	JMP	*4(SP) // JMP 4(SP)
	JCS	2(PC)
	JMP	*(R12) // JMP (R12)
	JCS	2(PC)
//	JMP	*(R12*4) // TODO: This line is silently dropped on the floor!
	JCS	2(PC)
	JMP	*(R12)(R13*4) // JMP (R12)(R13*4)
	JCS	2(PC)
	JMP	*(AX) // JMP (AX)
	JCS	2(PC)
	JMP	*(SP) // JMP (SP)
	JCS	2(PC)

//	LMOVH rreg ',' addr
//	{
//		outcode(int($1), &$2, 0, &$4);
//	}
	MOVH	R13, (R7)	// a4ed0000
	MOVH	R10, 61(R23)	// a6ea003d
	MOVH	R8, -33(R12)	// a588ffdf
	MOVHU	R13, (R7)	// a4ed0000
	MOVHU	R10, 61(R23)	// a6ea003d
	MOVHU	R8, -33(R12)	// a588ffdf

//	LMOVB rreg ',' addr
//	{
//		outcode(int($1), &$2, 0, &$4);
//	}
	MOVB	R1, foo<>+3(SB)
	MOVB	R5, -18(R4)	// a085ffee

(CX), X0 MOVL 12(CX), R10 MOVOU (AX), X11 MOVL 12(AX), R12 BSWAPL R10 BSWAPL R12 PXOR X0, X11 MOVOU X11, (SP) ADDL $0x01, R10 MOVL R10, R11 XORL R12, R11 BSWAPL R11 MOVL R11, 12(SP) CMPQ R9, $0x80 JB gcmAesDecSingles MOVOU X11, 16(SP) ADDL $0x01, R10 MOVL R10, R11 XORL R12, R11 BSWAPL R11 MOVL R11, 28(SP) MOVOU X11, 32(SP) ADDL $0x01, R10 MOVL R10, R11 XORL R12, R11 BSWAPL R11 MOVL R11, 44(SP) MOVOU X11, 48(SP) ADDL $0x01, R10 MOVL R10, R11 XORL R12, R11 BSWAPL R11 MOVL R11, 60(SP) MOVOU X11, 64(SP)...

			"\tMOVBLZX	(off*4)(R12),	reg \\",
			"\tADDB	reg,		DX",
			"",
			"LOAD(8, AX)",
		),
		"\n.\n.MOVBLZX.(.8.*.4.).(.R12.).,.AX.\n.ADDB.AX.,.DX.\n",
	},
	{
		"nested multiline macro",
		lines(
			"#define KEYROUND(xmm, load, off, r1, r2, index) \\",
			"\tMOVBLZX	(BP)(DX*4),	R8 \\",
			"\tload((off+1), r2) \\",
			"\tMOVB	R8,		(off*4)(R12) \\",
			"\tPINSRW	$index, (BP)(R8*4), xmm",

	AMORW		R14, (R13), R12 // ac396338
	AMORV		R14, (R13), R12 // acb96338
	AMXORW		R14, (R13), R12 // ac396438
	AMXORV		R14, (R13), R12 // acb96438
	AMMAXW		R14, (R13), R12 // ac396538
	AMMAXV		R14, (R13), R12 // acb96538
	AMMINW		R14, (R13), R12 // ac396638
	AMMINV		R14, (R13), R12 // acb96638
	AMMAXWU		R14, (R13), R12 // ac396738
	AMMAXVU		R14, (R13), R12 // acb96738
	AMMINWU		R14, (R13), R12 // ac396838

	LDAXRH (R5), R8                            // a8fc5f48
	//TODO LDNP 0xcc(RSP), ZR, R12             // ecff5928
	//TODO LDNP 0x40(R28), R9, R5              // 852744a8
	//TODO LDPSW -0xd0(R2), R0, R12            // 4c00e668
	//TODO LDPSW 0x5c(R4), R8, R5              // 85a0cb69
	//TODO LDPSW 0x6c(R12), R2, R27            // 9b894d69
	MOVWU.P -84(R15), R9                       // e9c55ab8

(CX), X0 MOVL 12(CX), R10 MOVOU (AX), X11 MOVL 12(AX), R12 BSWAPL R10 BSWAPL R12 PXOR X0, X11 MOVOU X11, (SP) ADDL $0x01, R10 MOVL R10, R11 XORL R12, R11 BSWAPL R11 MOVL R11, 12(SP) CMPQ R9, $0x80 JB gcmAesDecSingles MOVOU X11, 16(SP) ADDL $0x01, R10 MOVL R10, R11 XORL R12, R11 BSWAPL R11 MOVL R11, 28(SP) MOVOU X11, 32(SP) ADDL $0x01, R10 MOVL R10, R11 XORL R12, R11 BSWAPL R11 MOVL R11, 44(SP) MOVOU X11, 48(SP) ADDL $0x01, R10 MOVL R10, R11 XORL R12, R11 BSWAPL R11 MOVL R11, 60(SP) MOVOU X11, 64(SP)...

	{"AL", "AL"},
	{"AX", "AX"},
	{"BP", "BP"},
	{"BX", "BX"},
	{"CX", "CX"},
	{"DI", "DI"},
	{"DX", "DX"},
	{"R10", "R10"},
	{"R10", "R10"},
	{"R11", "R11"},
	{"R12", "R12"},
	{"R13", "R13"},
	{"R14", "R14"},
	{"R15", "R15"},
	{"R8", "R8"},
	{"R9", "R9"},
	{"g", "R14"},
	{"SI", "SI"},
	{"SP", "SP"},
	{"X0", "X0"},
	{"X1", "X1"},
	{"X10", "X10"},

	ADD	R2.SXTX<<1, RSP, RSP            // ffe7228b
	ADD	ZR.SXTX<<1, R2, R3              // 43e43f8b
	ADDW	R2.SXTW, R10, R12               // 4cc1220b
	ADD	R19.UXTX, R14, R17              // d161338b
	ADDSW	R19.UXTW, R14, R17              // d141332b
	ADDS	R12.SXTX, R3, R1                // 61e02cab
	SUB	R19.UXTH<<4, R2, R21            // 553033cb
	SUBW	R1.UXTX<<1, R3, R2              // 6264214b

	SQRTF	F0, F1        // c01ab1ee
	SQRTD	F4, F5        // c45bb1ee
	MOVFD	F0, F1        // c01ab7ee
	MOVDF	F4, F5        // c45bb7ee

	LDREX	(R8), R9      // 9f9f98e1
	LDREXB	(R11), R12    // 9fcfdbe1
	LDREXD	(R11), R12    // 9fcfbbe1
	STREX	R3, (R4), R5  // STREX  (R4), R3, R5 // 935f84e1
	STREXB	R8, (R9), g   // STREXB (R9), R8, g  // 98afc9e1
	STREXD	R8, (R9), g   // STREXD (R9), R8, g  // 98afa9e1