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Results 1 - 5 of 5 for STREX (0.21 sec)
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src/cmd/asm/internal/asm/testdata/armerror.s
MULA.W R9, R6, R1, g // ERROR "invalid .W suffix" MULS.S R2, R3, R4, g // ERROR "invalid .S suffix" STREX R1, (R0) // ERROR "illegal combination" STREX (R1), R0 // ERROR "illegal combination" STREX R1, (R0), R1 // ERROR "cannot use same register as both source and destination" STREX R1, (R0), R0 // ERROR "cannot use same register as both source and destination"
Others - Registered: Tue Apr 23 11:13:09 GMT 2024 - Last Modified: Fri Nov 03 14:06:21 GMT 2017 - 14.4K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/armv6.s
SQRTF F0, F1 // c01ab1ee SQRTD F4, F5 // c45bb1ee MOVFD F0, F1 // c01ab7ee MOVDF F4, F5 // c45bb7ee LDREX (R8), R9 // 9f9f98e1 LDREXD (R11), R12 // 9fcfbbe1 STREX R3, (R4), R5 // STREX (R4), R3, R5 // 935f84e1 STREXD R8, (R9), g // STREXD (R9), R8, g // 98afa9e1 CMPF F8, F9 // c89ab4ee10faf1ee CMPD.CS F4, F5 // c45bb42e10faf12e CMPF.VS F7 // c07ab56e10faf16e
Others - Registered: Tue Apr 23 11:13:09 GMT 2024 - Last Modified: Thu Dec 21 16:30:51 GMT 2017 - 4.6K bytes - Viewed (0) -
src/cmd/asm/internal/arch/arm.go
switch op { case arm.ACMN, arm.ACMP, arm.ATEQ, arm.ATST: return true } return false } // IsARMSTREX reports whether the op (as defined by an arm.A* constant) is // one of the STREX-like instructions that require special handling. func IsARMSTREX(op obj.As) bool { switch op { case arm.ASTREX, arm.ASTREXD, arm.ASWPW, arm.ASWPBU: return true } return false }
Go - Registered: Tue Apr 23 11:13:09 GMT 2024 - Last Modified: Fri Nov 18 17:59:44 GMT 2022 - 6.1K bytes - Viewed (0) -
src/cmd/asm/internal/asm/asm.go
prog.To = a[2] case sys.Loong64: prog.From = a[0] prog.Reg = p.getRegister(prog, op, &a[1]) prog.To = a[2] case sys.ARM: // Special cases. if arch.IsARMSTREX(op) { /* STREX x, (y), z from=(y) reg=x to=z */ prog.From = a[1] prog.Reg = p.getRegister(prog, op, &a[0]) prog.To = a[2] break } if arch.IsARMBFX(op) {
Go - Registered: Tue Apr 23 11:13:09 GMT 2024 - Last Modified: Wed Feb 21 14:34:57 GMT 2024 - 25.3K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm.s
MOVM [R2-R5], (R1) // MOVM [R2,R3,R4,R5], (R1) MOVM [R2], (R1) // // SWAP // // LTYPE9 cond reg ',' ireg ',' reg // { // outcode($1, $2, &$5, int32($3.Reg), &$7); // } STREX R1, (R2), R3 // STREX (R2), R1, R3 // // word // // LTYPEH comma ximm // { // outcode($1, Always, &nullgen, 0, &$3); // } WORD $1234 // // floating-point coprocessor //
Others - Registered: Tue Apr 23 11:13:09 GMT 2024 - Last Modified: Fri Dec 15 20:51:01 GMT 2023 - 69K bytes - Viewed (0)