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Results 11 - 20 of 22 for ORQ (0.26 sec)

  1. src/internal/runtime/atomic/atomic_amd64.s

    	MOVL 	AX, ret+16(FP)
    	RET
    
    // func Or64(addr *uint64, v uint64) old uint64
    TEXT ·Or64(SB), NOSPLIT, $0-24
    	MOVQ	ptr+0(FP), BX
    	MOVQ	val+8(FP), CX
    casloop:
    	MOVQ 	CX, DX
    	MOVQ	(BX), AX
    	ORQ	AX, DX
    	LOCK
    	CMPXCHGQ	DX, (BX)
    	JNZ casloop
    	MOVQ 	AX, ret+16(FP)
    	RET
    
    // func And64(addr *uint64, v uint64) old uint64
    TEXT ·And64(SB), NOSPLIT, $0-24
    	MOVQ	ptr+0(FP), BX
    	MOVQ	val+8(FP), CX
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 25 19:53:03 UTC 2024
    - 5.2K bytes
    - Viewed (0)
  2. src/crypto/internal/nistec/p256_asm_amd64.s

    	MOVQ acc4, t0
    	ORQ acc5, t0
    	ORQ acc6, t0
    	ORQ acc7, t0
    
    	// Set the zero flag if so. (CMOV of a constant to a register doesn't
    	// appear to be supported in Go. Thus t1 = 1.)
    	CMOVQEQ t1, AX
    
    	// XOR [acc4..acc7] with P and compare with zero again.
    	XORQ $-1, acc4
    	XORQ p256const0<>(SB), acc5
    	XORQ p256const1<>(SB), acc7
    	ORQ acc5, acc4
    	ORQ acc6, acc4
    	ORQ acc7, acc4
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 39.8K bytes
    - Viewed (0)
  3. src/cmd/compile/internal/ssa/_gen/AMD64.rules

    // but ORQ is the only one I've actually seen occur.
    (ORQ (MOVQconst [c]) (MOVQconst [d])) => (MOVQconst [c|d])
    
    // generic simplifications
    // TODO: more of this
    (ADDQ x (NEGQ y)) => (SUBQ x y)
    (ADDL x (NEGL y)) => (SUBL x y)
    (SUBQ x x) => (MOVQconst [0])
    (SUBL x x) => (MOVLconst [0])
    (ANDQ x x) => x
    (ANDL x x) => x
    (ORQ x x)  => x
    (ORL x x)  => x
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 12 19:38:41 UTC 2024
    - 93.9K bytes
    - Viewed (0)
  4. test/codegen/bits.go

    }
    
    func biton64(a, b uint64) (n uint64) {
    	// amd64:"BTSQ"
    	n += b | (1 << (a & 63))
    
    	// amd64:"BTSQ\t[$]63"
    	n += a | (1 << 63)
    
    	// amd64:"BTSQ\t[$]60"
    	n += a | (1 << 60)
    
    	// amd64:"ORQ\t[$]1"
    	n += a | (1 << 0)
    
    	return n
    }
    
    func bitoff64(a, b uint64) (n uint64) {
    	// amd64:"BTRQ"
    	n += b &^ (1 << (a & 63))
    
    	// amd64:"BTRQ\t[$]63"
    	n += a &^ (1 << 63)
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Jun 07 19:02:52 UTC 2024
    - 7.8K bytes
    - Viewed (0)
  5. src/cmd/internal/obj/x86/anames.go

    	"MULXL",
    	"MULXQ",
    	"MWAIT",
    	"NEGB",
    	"NEGL",
    	"NEGQ",
    	"NEGW",
    	"NOPL",
    	"NOPW",
    	"NOTB",
    	"NOTL",
    	"NOTQ",
    	"NOTW",
    	"ORB",
    	"ORL",
    	"ORPD",
    	"ORPS",
    	"ORQ",
    	"ORW",
    	"OUTB",
    	"OUTL",
    	"OUTSB",
    	"OUTSL",
    	"OUTSW",
    	"OUTW",
    	"PABSB",
    	"PABSD",
    	"PABSW",
    	"PACKSSLW",
    	"PACKSSWB",
    	"PACKUSDW",
    	"PACKUSWB",
    	"PADDB",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Apr 11 18:32:50 UTC 2023
    - 19.1K bytes
    - Viewed (0)
  6. src/cmd/asm/internal/asm/testdata/amd64enc.s

    	ORQ DX, (BX)                            // 480913
    	ORQ R11, (BX)                           // 4c091b
    	ORQ DX, (R11)                           // 490913
    	ORQ R11, (R11)                          // 4d091b
    	ORQ DX, DX                              // 4809d2 or 480bd2
    	ORQ R11, DX                             // 4c09da or 490bd3
    	ORQ DX, R11                             // 4909d3 or 4c0bda
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Oct 08 21:38:44 UTC 2021
    - 581.9K bytes
    - Viewed (0)
  7. src/runtime/sys_linux_amd64.s

    	JEQ	nog1
    	LEAQ	m_tls(R13), R8
    #ifdef GOOS_android
    	// Android stores the TLS offset in runtime·tls_g.
    	SUBQ	runtime·tls_g(SB), R8
    #else
    	ADDQ	$8, R8	// ELF wants to use -8(FS)
    #endif
    	ORQ 	$0x00080000, DI //add flag CLONE_SETTLS(0x00080000) to call clone
    nog1:
    	MOVL	$SYS_clone, AX
    	SYSCALL
    
    	// In parent, return.
    	CMPQ	AX, $0
    	JEQ	3(PC)
    	MOVL	AX, ret+40(FP)
    	RET
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Mar 24 18:53:44 UTC 2023
    - 15.7K bytes
    - Viewed (0)
  8. src/cmd/compile/internal/ssa/rewriteAMD64.go

    			v.reset(OpAMD64MOVQconst)
    			v.AuxInt = int64ToAuxInt(c | d)
    			return true
    		}
    		break
    	}
    	// match: (ORQ x x)
    	// result: x
    	for {
    		x := v_0
    		if x != v_1 {
    			break
    		}
    		v.copyOf(x)
    		return true
    	}
    	// match: (ORQ x l:(MOVQload [off] {sym} ptr mem))
    	// cond: canMergeLoadClobber(v, l, x) && clobber(l)
    	// result: (ORQload x [off] {sym} ptr mem)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 12 19:38:41 UTC 2024
    - 712.7K bytes
    - Viewed (0)
  9. src/runtime/asm_amd64.s

    GLOBL masks<>(SB),RODATA,$256
    
    // func checkASM() bool
    TEXT ·checkASM(SB),NOSPLIT,$0-1
    	// check that masks<>(SB) and shifts<>(SB) are aligned to 16-byte
    	MOVQ	$masks<>(SB), AX
    	MOVQ	$shifts<>(SB), BX
    	ORQ	BX, AX
    	TESTQ	$15, AX
    	SETEQ	ret+0(FP)
    	RET
    
    // these are arguments to pshufb. They move data down from
    // the high bytes of the register to the low bytes of the register.
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat May 11 20:38:24 UTC 2024
    - 60.4K bytes
    - Viewed (0)
  10. tensorflow/compiler/jit/tests/opens2s_gnmt_mixed_precision.pbtxt.gz

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    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Jun 03 18:14:27 UTC 2019
    - 195.5K bytes
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