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Results 1 - 9 of 9 for NOTQ (0.3 sec)

  1. src/vendor/golang.org/x/crypto/sha3/keccakf_amd64.s

    // func keccakF1600(a *[25]uint64)
    TEXT ·keccakF1600(SB), 0, $200-8
    	MOVQ a+0(FP), rpState
    
    	// Convert the user state into an internal state
    	NOTQ _be(rpState)
    	NOTQ _bi(rpState)
    	NOTQ _go(rpState)
    	NOTQ _ki(rpState)
    	NOTQ _mi(rpState)
    	NOTQ _sa(rpState)
    
    	// Execute the KeccakF permutation
    	MOVQ _ba(rpState), rCa
    	MOVQ _be(rpState), rCe
    	MOVQ _bu(rpState), rCu
    
    	XORQ _ga(rpState), rCa
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Apr 10 16:37:53 UTC 2024
    - 14.2K bytes
    - Viewed (0)
  2. src/cmd/internal/obj/x86/anames.go

    	"MULPD",
    	"MULPS",
    	"MULQ",
    	"MULSD",
    	"MULSS",
    	"MULW",
    	"MULXL",
    	"MULXQ",
    	"MWAIT",
    	"NEGB",
    	"NEGL",
    	"NEGQ",
    	"NEGW",
    	"NOPL",
    	"NOPW",
    	"NOTB",
    	"NOTL",
    	"NOTQ",
    	"NOTW",
    	"ORB",
    	"ORL",
    	"ORPD",
    	"ORPS",
    	"ORQ",
    	"ORW",
    	"OUTB",
    	"OUTL",
    	"OUTSB",
    	"OUTSL",
    	"OUTSW",
    	"OUTW",
    	"PABSB",
    	"PABSD",
    	"PABSW",
    	"PACKSSLW",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Apr 11 18:32:50 UTC 2023
    - 19.1K bytes
    - Viewed (0)
  3. src/runtime/sys_linux_amd64.s

    	MOVQ	n+8(FP), SI
    	MOVL	prot+16(FP), DX
    	MOVL	flags+20(FP), R10
    	MOVL	fd+24(FP), R8
    	MOVL	off+28(FP), R9
    
    	MOVL	$SYS_mmap, AX
    	SYSCALL
    	CMPQ	AX, $0xfffffffffffff001
    	JLS	ok
    	NOTQ	AX
    	INCQ	AX
    	MOVQ	$0, p+32(FP)
    	MOVQ	AX, err+40(FP)
    	RET
    ok:
    	MOVQ	AX, p+32(FP)
    	MOVQ	$0, err+40(FP)
    	RET
    
    // Call the function stored in _cgo_mmap using the GCC calling convention.
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Mar 24 18:53:44 UTC 2023
    - 15.7K bytes
    - Viewed (0)
  4. src/crypto/sha512/sha512block_amd64.s

    	MOVQ	e, AX; \
    	ADDQ	DX, h; \
    	MOVQ	e, CX; \
    	RORQ	$14, AX; \
    	MOVQ	e, DX; \
    	RORQ	$18, CX; \
    	XORQ	CX, AX; \
    	MOVQ	e, CX; \
    	RORQ	$41, DX; \
    	ANDQ	f, CX; \
    	XORQ	AX, DX; \
    	MOVQ	e, AX; \
    	NOTQ	AX; \
    	ADDQ	DX, h; \
    	ANDQ	g, AX; \
    	XORQ	CX, AX; \
    	ADDQ	h, AX
    
    // Calculate T2 in BX - uses BX, CX, DX and DI registers.
    //   T2 = BIGSIGMA0(a) + Maj(a, b, c)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 27K bytes
    - Viewed (0)
  5. src/cmd/compile/internal/ssa/_gen/AMD64Ops.go

    		{name: "NEGQ", argLength: 1, reg: gp11, asm: "NEGQ", resultInArg0: true, clobberFlags: true},
    		{name: "NEGL", argLength: 1, reg: gp11, asm: "NEGL", resultInArg0: true, clobberFlags: true},
    		{name: "NOTQ", argLength: 1, reg: gp11, asm: "NOTQ", resultInArg0: true},
    		{name: "NOTL", argLength: 1, reg: gp11, asm: "NOTL", resultInArg0: true},
    
    		// BS{F,R}Q returns a tuple [result, flags]
    		// result is undefined if the input is zero.
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Aug 04 16:40:24 UTC 2023
    - 98K bytes
    - Viewed (1)
  6. src/cmd/asm/internal/asm/testdata/amd64enc.s

    	NOTL DX                                 // f7d2
    	NOTL R11                                // 41f7d3
    	NOTQ (BX)                               // 48f713
    	NOTQ (R11)                              // 49f713
    	NOTQ DX                                 // 48f7d2
    	NOTQ R11                                // 49f7d3
    	NOTB (BX)                               // f613
    	NOTB (R11)                              // 41f613
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Oct 08 21:38:44 UTC 2021
    - 581.9K bytes
    - Viewed (0)
  7. src/cmd/compile/internal/ssa/_gen/AMD64.rules

    (ORQconst [c] (MOVQconst [d])) => (MOVQconst [int64(c)|d])
    (ORLconst [c] (MOVLconst [d])) => (MOVLconst [c|d])
    (XORQconst [c] (MOVQconst [d])) => (MOVQconst [int64(c)^d])
    (XORLconst [c] (MOVLconst [d])) => (MOVLconst [c^d])
    (NOTQ (MOVQconst [c])) => (MOVQconst [^c])
    (NOTL (MOVLconst [c])) => (MOVLconst [^c])
    (BTSQconst [c] (MOVQconst [d])) => (MOVQconst [d|(1<<uint32(c))])
    (BTRQconst [c] (MOVQconst [d])) => (MOVQconst [d&^(1<<uint32(c))])
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 12 19:38:41 UTC 2024
    - 93.9K bytes
    - Viewed (0)
  8. src/cmd/compile/internal/ssa/rewriteAMD64.go

    		return true
    	}
    	return false
    }
    func rewriteValueAMD64_OpAMD64ANDQ(v *Value) bool {
    	v_1 := v.Args[1]
    	v_0 := v.Args[0]
    	b := v.Block
    	typ := &b.Func.Config.Types
    	// match: (ANDQ (NOTQ (SHLQ (MOVQconst [1]) y)) x)
    	// result: (BTRQ x y)
    	for {
    		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
    			if v_0.Op != OpAMD64NOTQ {
    				continue
    			}
    			v_0_0 := v_0.Args[0]
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 12 19:38:41 UTC 2024
    - 712.7K bytes
    - Viewed (0)
  9. src/cmd/compile/internal/ssa/opGen.go

    			},
    			outputs: []outputInfo{
    				{0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
    			},
    		},
    	},
    	{
    		name:         "NOTQ",
    		argLen:       1,
    		resultInArg0: true,
    		asm:          x86.ANOTQ,
    		reg: regInfo{
    			inputs: []inputInfo{
    				{0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
    			},
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 1M bytes
    - Viewed (0)
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