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Results 1 - 10 of 24 for ORL (0.02 sec)

  1. src/math/hypot_386.s

    	FMOVDP  F0, ret+16(FP)
    	RET
    not_finite:
    // test bits for -Inf or +Inf
    	MOVL    p_hi+4(FP), AX  // high word p
    	ORL     p_lo+0(FP), AX  // low word p
    	ANDL    $0x7fffffff, AX
    	CMPL    AX, $0x7ff00000
    	JEQ     is_inf
    	MOVL    q_hi+12(FP), AX  // high word q
    	ORL     q_lo+8(FP), AX   // low word q
    	ANDL    $0x7fffffff, AX
    	CMPL    AX, $0x7ff00000
    	JEQ     is_inf
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Apr 15 15:48:19 UTC 2021
    - 1.8K bytes
    - Viewed (0)
  2. src/internal/runtime/atomic/atomic_386.s

    	// DI:SI = v
    	MOVL	val_lo+4(FP), SI
    	MOVL	val_hi+8(FP), DI
    	// DX:AX = *addr
    	MOVL	0(BP), AX
    	MOVL	4(BP), DX
    casloop:
    	// CX:BX = DX:AX (*addr) | DI:SI (mask)
    	MOVL	AX, BX
    	MOVL	DX, CX
    	ORL	SI, BX
    	ORL	DI, CX
    	LOCK
    	CMPXCHG8B	0(BP)
    	JNZ casloop
    	MOVL	AX, ret_lo+12(FP)
    	MOVL	DX, ret_hi+16(FP)
    	RET
    
    // func Anduintptr(addr *uintptr, v uintptr) old uintptr
    TEXT ·Anduintptr(SB), NOSPLIT, $0-12
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 25 19:53:03 UTC 2024
    - 6.5K bytes
    - Viewed (0)
  3. test/codegen/bits.go

    		return 1
    	}
    	return 0
    }
    
    func biton32(a, b uint32) (n uint32) {
    	// amd64:"BTSL"
    	n += b | (1 << (a & 31))
    
    	// amd64:"ORL\t[$]-2147483648"
    	n += a | (1 << 31)
    
    	// amd64:"ORL\t[$]268435456"
    	n += a | (1 << 28)
    
    	// amd64:"ORL\t[$]1"
    	n += a | (1 << 0)
    
    	return n
    }
    
    func bitoff32(a, b uint32) (n uint32) {
    	// amd64:"BTRL"
    	n += b &^ (1 << (a & 31))
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Jun 07 19:02:52 UTC 2024
    - 7.8K bytes
    - Viewed (0)
  4. src/crypto/sha256/sha256block_amd64.s

    	RORXL    $11, e, y1;                  \ // y1 = e >> 11				// S1B
    	;                                     \
    	ADDL     (disp + 0*4)(SP)(SRND*1), h; \ // h = k + w + h        // disp = k + w
    	ORL      c, y3;                       \ // y3 = a|c				// MAJA
    	VPALIGNR $4, XDWORD2, XDWORD3, XTMP0; \ // XTMP0 = W[-7]
    	MOVL     f, y2;                       \ // y2 = f				// CH
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 47.3K bytes
    - Viewed (0)
  5. test/codegen/memops.go

    	s *= x[i+3]
    	// 386: `ANDL\t16\([A-Z]+\)\([A-Z]+\*4\), [A-Z]+`
    	// amd64: `ANDL\t16\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*4\), [A-Z]+[0-9]*`
    	s &= x[i+4]
    	// 386: `ORL\t20\([A-Z]+\)\([A-Z]+\*4\), [A-Z]+`
    	// amd64: `ORL\t20\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*4\), [A-Z]+[0-9]*`
    	s |= x[i+5]
    	// 386: `XORL\t24\([A-Z]+\)\([A-Z]+\*4\), [A-Z]+`
    	// amd64: `XORL\t24\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*4\), [A-Z]+[0-9]*`
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Aug 04 16:40:24 UTC 2023
    - 12.5K bytes
    - Viewed (0)
  6. src/crypto/md5/md5block_386.s

    	ROLL $shift, a; \
    	MOVL c, BP; \
    	ADDL b, a
    
    #define ROUND2(a, b, c, d, index, const, shift) \
    	LEAL	const(a)(DI*1),a; \
    	MOVL	d,		DI; \
    	ANDL	b,		DI; \
    	MOVL	d,		BP; \
    	NOTL	BP; \
    	ANDL	c,		BP; \
    	ORL	DI,		BP; \
    	MOVL	(index*4)(SI),DI; \
    	ADDL	BP,		a; \
    	ROLL	$shift,	a; \
    	ADDL	b,		a
    
    #define ROUND3(a, b, c, d, index, const, shift) \
    	LEAL	const(a)(DI*1),a; \
    	MOVL	(index*4)(SI),DI; \
    	XORL	d,		BP; \
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 4.5K bytes
    - Viewed (0)
  7. src/internal/runtime/atomic/atomic_amd64.s

    	MOVQ	ptr+0(FP), AX
    	MOVB	val+8(FP), BX
    	LOCK
    	ANDB	BX, (AX)
    	RET
    
    // func Or(addr *uint32, v uint32)
    TEXT ·Or(SB), NOSPLIT, $0-12
    	MOVQ	ptr+0(FP), AX
    	MOVL	val+8(FP), BX
    	LOCK
    	ORL	BX, (AX)
    	RET
    
    // func And(addr *uint32, v uint32)
    TEXT ·And(SB), NOSPLIT, $0-12
    	MOVQ	ptr+0(FP), AX
    	MOVL	val+8(FP), BX
    	LOCK
    	ANDL	BX, (AX)
    	RET
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 25 19:53:03 UTC 2024
    - 5.2K bytes
    - Viewed (0)
  8. src/cmd/compile/internal/ssa/_gen/386Ops.go

    		{name: "ANDLconst", argLength: 1, reg: gp11, asm: "ANDL", aux: "Int32", resultInArg0: true, clobberFlags: true}, // arg0 & auxint
    
    		{name: "ORL", argLength: 2, reg: gp21, asm: "ORL", commutative: true, resultInArg0: true, clobberFlags: true}, // arg0 | arg1
    		{name: "ORLconst", argLength: 1, reg: gp11, asm: "ORL", aux: "Int32", resultInArg0: true, clobberFlags: true}, // arg0 | auxint
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 14 08:10:32 UTC 2023
    - 45.1K bytes
    - Viewed (0)
  9. src/crypto/sha1/sha1block_386.s

    	XORL	c, DI; \
    	ANDL	b, DI; \
    	XORL	d, DI
    
    #define FUNC2(a, b, c, d, e) \
    	MOVL	b, DI; \
    	XORL	c, DI; \
    	XORL	d, DI
    
    #define FUNC3(a, b, c, d, e) \
    	MOVL	b, SI; \
    	ORL	c, SI; \
    	ANDL	d, SI; \
    	MOVL	b, DI; \
    	ANDL	c, DI; \
    	ORL	SI, DI
    
    #define FUNC4 FUNC2
    
    #define MIX(a, b, c, d, e, const) \
    	ROLL	$30, b; \
    	ADDL	DI, e; \
    	MOVL	a, SI; \
    	ROLL	$5, SI; \
    	LEAL	const(e)(SI*1), e
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 6K bytes
    - Viewed (0)
  10. src/cmd/compile/internal/ssa/_gen/AMD64Ops.go

    		{name: "ORLloadidx1", argLength: 4, reg: gp21loadidx, asm: "ORL", scale: 1, aux: "SymOff", resultInArg0: true, clobberFlags: true, symEffect: "Read"},
    		{name: "ORLloadidx4", argLength: 4, reg: gp21loadidx, asm: "ORL", scale: 4, aux: "SymOff", resultInArg0: true, clobberFlags: true, symEffect: "Read"},
    		{name: "ORLloadidx8", argLength: 4, reg: gp21loadidx, asm: "ORL", scale: 8, aux: "SymOff", resultInArg0: true, clobberFlags: true, symEffect: "Read"},
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Aug 04 16:40:24 UTC 2023
    - 98K bytes
    - Viewed (1)
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