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Results 1 - 7 of 7 for MOVQ (0.04 sec)
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src/cmd/asm/internal/asm/testdata/amd64error.s
MOVQ (AX), CR3 // ERROR "invalid instruction" MOVQ (AX), CR4 // ERROR "invalid instruction" MOVQ (AX), CR8 // ERROR "invalid instruction" MOVQ DR0, (AX) // ERROR "invalid instruction" MOVQ DR2, (AX) // ERROR "invalid instruction" MOVQ DR3, (AX) // ERROR "invalid instruction"
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Wed Jun 14 00:03:57 UTC 2023 - 8.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/386enc.s
TEXT asmtest(SB),DUPOK|NOSPLIT,$0 // Instructions that were encoded with BYTE sequences. // Included to simplify validation of CL that fixed that. MOVQ (AX), M0 // 0f6f00 MOVQ M0, 8(SP) // 0f7f442408 MOVQ 8(SP), M0 // 0f6f442408 MOVQ M0, (AX) // 0f7f00 MOVQ M0, (BX) // 0f7f03 // On non-64bit arch, Go asm allowed uint32 offsets instead of int32. // These tests check that property for backwards-compatibility.
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Tue Apr 11 18:32:50 UTC 2023 - 1.2K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/amd64.s
// Intel pseudonyms for our own renamings. PADDD M2, M1 // PADDL M2, M1 MOVDQ2Q X1, M1 // MOVQ X1, M1 MOVNTDQ X1, (AX) // MOVNTO X1, (AX) MOVOA (AX), X1 // MOVO (AX), X1 // Tests for SP indexed addresses. MOVQ foo(SP)(AX*1), BX // 488b1c04 MOVQ foo+32(SP)(CX*2), DX // 488b544c20 MOVQ foo+32323(SP)(R8*4), R9 // 4e8b8c84437e0000 MOVL foo(SP)(SI*8), DI // 8b3cf4
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Tue Apr 09 18:57:21 UTC 2019 - 3.3K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/amd64dynlinkerror.s
CMPL runtime·writeBarrier(SB), $0 MOVQ (R15), AX // ERROR "when dynamic linking, R15 is clobbered by a global variable access and is used here" RET TEXT ·a18(SB), 0, $0-0 CMPL runtime·writeBarrier(SB), $0 MOVQ (CX)(R15*1), AX // ERROR "when dynamic linking, R15 is clobbered by a global variable access and is used here" RET TEXT ·a19(SB), 0, $0-0 CMPL runtime·writeBarrier(SB), $0
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Wed Mar 15 20:45:41 UTC 2023 - 4.8K bytes - Viewed (0) -
doc/asm.html
x.go:3 0x10501c0 65488b0c2530000000 MOVQ GS:0x30, CX x.go:3 0x10501c9 483b6110 CMPQ 0x10(CX), SP x.go:3 0x10501cd 7634 JBE 0x1050203 x.go:3 0x10501cf 4883ec10 SUBQ $0x10, SP x.go:3 0x10501d3 48896c2408 MOVQ BP, 0x8(SP) x.go:3 0x10501d8 488d6c2408 LEAQ 0x8(SP), BP x.go:4 0x10501dd e86e45fdff CALL runtime.printlock(SB) x.go:4 0x10501e2 48c7042403000000 MOVQ $0x3, 0(SP)
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Tue Nov 28 19:15:27 UTC 2023 - 36.3K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/amd64enc.s
//TODO: MOVW 0x123456789abcdef1, AX // 66a1f1debc9a78563412 MOVQ DX, CR2 // 0f22d2 MOVQ R11, CR2 // 410f22d3 MOVQ DX, CR3 // 0f22da MOVQ R11, CR3 // 410f22db MOVQ DX, DR2 // 0f23d2 MOVQ R11, DR2 // 410f23d3 MOVQ DX, DR3 // 0f23da
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Fri Oct 08 21:38:44 UTC 2021 - 581.9K bytes - Viewed (1) -
src/cmd/asm/internal/asm/testdata/amd64enc_extra.s
// Make sure MOV CR/DR continues to work after changing its movtabs. MOVQ CR0, AX // 0f20c0 MOVQ CR0, DX // 0f20c2 MOVQ CR4, DI // 0f20e7 MOVQ AX, CR0 // 0f22c0 MOVQ DX, CR0 // 0f22c2 MOVQ DI, CR4 // 0f22e7 MOVQ DR0, AX // 0f21c0 MOVQ DR6, DX // 0f21f2 MOVQ DR7, SI // 0f21fe // Test other movtab entries. PUSHQ GS // 0fa8 PUSHQ FS // 0fa0 POPQ FS // 0fa1
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Tue Apr 11 18:32:50 UTC 2023 - 57.6K bytes - Viewed (0)