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Results 151 - 160 of 225 for MOVW (0.05 sec)
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src/syscall/asm_linux_loong64.s
TEXT ·rawVforkSyscall(SB),NOSPLIT,$0-48 MOVV a1+8(FP), R4 MOVV a2+16(FP), R5 MOVV a3+24(FP), R6 MOVV $0, R7 MOVV $0, R8 MOVV $0, R9 MOVV trap+0(FP), R11 // syscall entry SYSCALL MOVW $-4096, R12 BGEU R12, R4, ok MOVV $-1, R12 MOVV R12, r1+32(FP) // r1 SUBVU R4, R0, R4 MOVV R4, err+40(FP) // errno RET ok: MOVV R4, r1+32(FP) // r1 MOVV R0, err+40(FP) // errno RET
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Sep 07 19:11:15 UTC 2023 - 947 bytes - Viewed (0) -
src/cmd/internal/obj/wasm/anames.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 02 05:28:55 UTC 2023 - 2.8K bytes - Viewed (0) -
src/runtime/preempt_s390x.s
// Code generated by mkpreempt.go; DO NOT EDIT. #include "go_asm.h" #include "textflag.h" TEXT ·asyncPreempt(SB),NOSPLIT|NOFRAME,$0-0 IPM R10 MOVD R14, -248(R15) ADD $-248, R15 MOVW R10, 8(R15) STMG R0, R12, 16(R15) FMOVD F0, 120(R15) FMOVD F1, 128(R15) FMOVD F2, 136(R15) FMOVD F3, 144(R15) FMOVD F4, 152(R15) FMOVD F5, 160(R15) FMOVD F6, 168(R15) FMOVD F7, 176(R15) FMOVD F8, 184(R15) FMOVD F9, 192(R15)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 21 21:52:38 UTC 2021 - 1K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/plan9.go
STDCXCC: "STDCCC", LI: "MOVD", LBZ: "MOVBZ", STB: "MOVB", LBZU: "MOVBZU", STBU: "MOVBU", LHZ: "MOVHZ", LHA: "MOVH", STH: "MOVH", LHZU: "MOVHZU", STHU: "MOVHU", LWZ: "MOVWZ", LWA: "MOVW", STW: "MOVW", LWZU: "MOVWZU", STWU: "MOVWU", LD: "MOVD", STD: "MOVD", LDU: "MOVDU", STDU: "MOVDU", LFD: "FMOVD", STFD: "FMOVD", LFS: "FMOVS", STFS: "FMOVS", LFDX: "FMOVD", STFDX: "FMOVD",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 22 17:16:14 UTC 2022 - 10.9K bytes - Viewed (0) -
src/cmd/internal/obj/loong64/anames.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 02:04:54 UTC 2024 - 1.9K bytes - Viewed (0) -
src/math/log1p_s390x.s
BYTE $0x7F BYTE $0xFF SRAD $32, R3, R3 SUBW R3, R1 SRW $16, R1, R1 BYTE $0x18 //lr %r4,%r1 BYTE $0x41 RISBGN $0, $15, $48, R4, R2 RISBGN $16, $31, $32, R4, R5 MOVW R0, R6 MOVW R3, R7 CMPBGT R6, R7, L8 WFCEDBS V4, V4, V6 MOVD $·log1pxzero<>+0(SB), R1 FMOVD 0(R1), F2 BVS LEXITTAGlog1p WORD $0xB3130044 // lcdbr %f4,%f4 WFCEDBS V2, V4, V6 BEQ L9
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 16 15:34:41 UTC 2019 - 5.1K bytes - Viewed (0) -
src/runtime/memclr_amd64.s
VMOVDQU Y0, -64(DI)(BX*1) VMOVDQU Y0, -96(DI)(BX*1) VMOVDQU Y0, -128(DI)(BX*1) VZEROUPPER RET _1or2: MOVB AX, (DI) MOVB AX, -1(DI)(BX*1) RET _0: RET _3or4: MOVW AX, (DI) MOVW AX, -2(DI)(BX*1) RET _5through7: MOVL AX, (DI) MOVL AX, -4(DI)(BX*1) RET _8: // We need a separate case for 8 to make sure we clear pointers atomically. MOVQ AX, (DI) RET
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue May 10 20:52:34 UTC 2022 - 4.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/MIPS64Ops.go
// moves (no conversion) {name: "MOVWfpgp", argLength: 1, reg: fpgp, asm: "MOVW"}, // move float32 to int32 (no conversion). MIPS64 will perform sign-extend to 64-bit by default {name: "MOVWgpfp", argLength: 1, reg: gpfp, asm: "MOVW"}, // move int32 to float32 (no conversion). MIPS64 will perform sign-extend to 64-bit by default
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 24 03:36:31 UTC 2023 - 25.5K bytes - Viewed (0) -
src/math/log_s390x.s
MOVH $0x8006, R4 LGDR F0, R1 MOVD $0x3FF0000000000000, R6 SRAD $48, R1, R1 MOVD $0x40F03E8000000000, R8 SUBW R1, R4 RISBGZ $32, $59, $0, R4, R2 RISBGN $0, $15, $48, R2, R6 RISBGN $16, $31, $32, R2, R8 MOVW R1, R7 CMPBGT R7, $22, L17 LTDBR F0, F0 MOVD $·logx43f<>+0(SB), R1 FMOVD 0(R1), F2 BLEU L3 MOVH $0x8005, R12 MOVH $0x8405, R0 BR L15 L7: LTDBR F0, F0 BLEU L3 L15: FMUL F2, F0
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 16 15:34:41 UTC 2019 - 4.3K bytes - Viewed (0) -
src/runtime/sys_freebsd_386.s
ADDL $0x4, BX // set up data_desc LEAL 16(SP), AX // struct data_desc MOVL $0, 0(AX) MOVL $0, 4(AX) MOVW BX, 2(AX) SHRL $16, BX MOVB BX, 4(AX) SHRL $8, BX MOVB BX, 7(AX) MOVW $0xffff, 0(AX) MOVB $0xCF, 6(AX) // 32-bit operand, 4k limit unit, 4 more bits of limit MOVB $0xF2, 5(AX) // r/w data descriptor, dpl=3, present
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Jun 06 18:49:01 UTC 2023 - 9.4K bytes - Viewed (0)