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Results 1 - 10 of 16 for spr (0.02 sec)
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src/runtime/defs_windows_arm.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 05 08:26:52 UTC 2023 - 2.6K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/gnu.go
buf.WriteString(opcode[0:2]) switch spr := inst.Args[0].(type) { case SpReg: switch spr { case 1: buf.WriteString("xer") startArg = 1 case 8: buf.WriteString("lr") startArg = 1 case 9: buf.WriteString("ctr") startArg = 1 default: buf.WriteString("spr") } default: buf.WriteString("spr") } case "mfspr":
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 23:33:33 UTC 2023 - 12.2K bytes - Viewed (0) -
src/cmd/internal/obj/arm64/anames7.go
// This order should be strictly consistent to that in a.out.go var cnames7 = []string{ "", // C_NONE starts from 1 "NONE", "REG", "ZREG", "RSP", "FREG", "VREG", "PAIR", "SHIFT", "EXTREG", "SPR", "SPOP", "COND", "ARNG", "ELEM", "LIST", "ZCON", "ABCON0", "ADDCON0", "ABCON", "AMCON", "ADDCON", "MBCON", "MOVCON", "BITCON", "ADDCON2", "LCON", "MOVCON2",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Jul 31 16:37:49 UTC 2023 - 1.6K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/anames9.go
// license that can be found in the LICENSE file. package ppc64 var cnames9 = []string{ "NONE", "REGP", "REG", "FREGP", "FREG", "VREG", "VSREGP", "VSREG", "CREG", "CRBIT", "SPR", "MREG", "ZCON", "U1CON", "U2CON", "U3CON", "U4CON", "U5CON", "U8CON", "U15CON", "S16CON", "U16CON", "16CON", "U31CON", "S32CON", "U32CON", "32CON", "S34CON",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Feb 09 22:14:57 UTC 2024 - 673 bytes - Viewed (0) -
src/cmd/internal/obj/arm/anames5.go
// license that can be found in the LICENSE file. package arm var cnames5 = []string{ "NONE", "REG", "REGREG", "REGREG2", "REGLIST", "SHIFT", "SHIFTADDR", "FREG", "PSR", "FCR", "SPR", "RCON", "NCON", "RCON2A", "RCON2S", "SCON", "LCON", "LCONADDR", "ZFCON", "SFCON", "LFCON", "RACON", "LACON", "SBRA", "LBRA", "HAUTO", "FAUTO", "HFAUTO",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 27 19:54:44 UTC 2018 - 1.3K bytes - Viewed (0) -
src/cmd/asm/internal/arch/ppc64.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 17 21:53:50 UTC 2024 - 2.2K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/list9.go
} if REG_SPR0 <= r && r <= REG_SPR0+1023 { switch r { case REG_XER: return "XER" case REG_LR: return "LR" case REG_CTR: return "CTR" } return fmt.Sprintf("SPR(%d)", r-REG_SPR0) } if r == REG_FPSCR { return "FPSCR" } if r == REG_MSR { return "MSR" } return fmt.Sprintf("Rgok(%d)", r-obj.RBasePPC64) } func DRconv(a int) string {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Sep 15 21:12:43 UTC 2022 - 3.3K bytes - Viewed (0) -
src/cmd/asm/internal/arch/arch.go
// Map of instruction names to enumeration. Instructions map[string]obj.As // Map of register names to enumeration. Register map[string]int16 // Table of register prefix names. These are things like R for R(0) and SPR for SPR(268). RegisterPrefix map[string]bool // RegisterNumber converts R(10) into arm.REG_R10. RegisterNumber func(string, int16) (int16, bool) // Instruction is a jump. IsJump func(word string) bool }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 21 06:51:28 UTC 2023 - 21.3K bytes - Viewed (0) -
src/cmd/asm/internal/asm/operand_test.go
{"R27", "R27"}, {"R28", "R28"}, {"R29", "R29"}, {"R3", "R3"}, {"R31", "R31"}, {"R4", "R4"}, {"R5", "R5"}, {"R6", "R6"}, {"R7", "R7"}, {"R8", "R8"}, {"R9", "R9"}, {"SPR(269)", "SPR(269)"}, {"a(FP)", "a(FP)"}, {"g", "g"}, {"ret+8(FP)", "ret+8(FP)"}, {"runtime·abort(SB)", "runtime.abort(SB)"}, {"·AddUint32(SB)", "pkg.AddUint32(SB)"}, {"·trunc(SB)", "pkg.trunc(SB)"},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Aug 29 18:31:05 UTC 2023 - 23.9K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/plan9.go
} case Imm: return fmt.Sprintf("$%d", arg) case SpReg: switch arg { case 8: return "LR" case 9: return "CTR" } return fmt.Sprintf("SPR(%d)", int(arg)) case PCRel: addr := pc + uint64(int64(arg)) s, base := symname(addr) if s != "" && addr == base { return fmt.Sprintf("%s(SB)", s) } if inst.Op == BL && s != "" && (addr-base) == 8 {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 22 17:16:14 UTC 2022 - 10.9K bytes - Viewed (0)