package mips

var cnames0 = []string{
	"NONE",
	"REG",
	"FREG",
	"FCREG",
	"MREG",
	"WREG",
	"HI",
	"LO",
	"ZCON",
	"SCON",
	"UCON",
	"ADD0CON",
	"AND0CON",
	"ADDCON",
	"ANDCON",
	"LCON",
	"DCON",
	"SACON",
	"SECON",
	"LACON",
	"LECON",
	"DACON",
	"STCON",
	"SBRA",
	"LBRA",
	"SAUTO",
	"LAUTO",
	"SEXT",
	"LEXT",
	"ZOREG",
	"SOREG",

// This order should be strictly consistent to that in a.out.go.
var cnames0 = []string{
	"NONE",
	"REG",
	"FREG",
	"FCSRREG",
	"FCCREG",
	"ZCON",
	"SCON",
	"UCON",
	"ADD0CON",
	"AND0CON",
	"ADDCON",
	"ANDCON",
	"LCON",
	"DCON",
	"SACON",
	"SECON",
	"LACON",
	"LECON",
	"DACON",
	"STCON",
	"SBRA",
	"LBRA",
	"SAUTO",
	"LAUTO",
	"SEXT",
	"LEXT",
	"ZOREG",
	"SOREG",

// license that can be found in the LICENSE file.

package s390x

var cnamesz = []string{
	"NONE",
	"REG",
	"FREG",
	"VREG",
	"AREG",
	"ZCON",
	"SCON",
	"UCON",
	"ADDCON",
	"ANDCON",
	"LCON",
	"DCON",
	"SACON",
	"LACON",
	"DACON",
	"SBRA",
	"LBRA",
	"SAUTO",
	"LAUTO",
	"ZOREG",
	"SOREG",
	"LOREG",
	"TLS_LE",
	"TLS_IE",
	"GOK",
	"ADDR",

	"ZREG",
	"RSP",
	"FREG",
	"VREG",
	"PAIR",
	"SHIFT",
	"EXTREG",
	"SPR",
	"SPOP",
	"COND",
	"ARNG",
	"ELEM",
	"LIST",
	"ZCON",
	"ABCON0",
	"ADDCON0",
	"ABCON",
	"AMCON",
	"ADDCON",
	"MBCON",
	"MOVCON",
	"BITCON",
	"ADDCON2",
	"LCON",
	"MOVCON2",
	"MOVCON3",
	"VCON",
	"FCON",
	"VCONADDR",
	"AACON",
	"AACON2",
	"LACON",
	"AECON",
	"SBRA",
	"LBRA",

	// a better choice, it introduces a race condition; If we complete initialization of a new push
	// context between initializeProxy and addCon, we would not get any pushes triggered for the new
	// push context, leading the proxy to have a stale state until the next full push.
	s.addCon(con.ID(), con)
	// Register that initialization is complete. This triggers to calls that it is safe to access the
	// proxy
	defer con.MarkInitialized()

	C_VCON     // 64-bit constant
	C_FCON     // floating-point constant
	C_VCONADDR // 64-bit memory address

	C_AACON  // ADDCON offset in auto constant $a(FP)
	C_AACON2 // 24-bit offset in auto constant $a(FP)
	C_LACON  // 32-bit offset in auto constant $a(FP)
	C_AECON  // ADDCON offset in extern constant $e(SB)

	// TODO(aram): only one branch class should be enough
	C_SBRA // for TYPE_BRANCH
	C_LBRA

		} else {
			o1 = loadu32(int(p.To.Reg), d)
			o2 = LOP_IRR(OP_ORI, uint32(p.To.Reg), uint32(p.To.Reg), uint32(int32(d)))
		}

	case 20: /* add $ucon,,r | addis $addcon,r,r */
		v := c.regoff(&p.From)

		r := int(p.Reg)
		if r == 0 {
			r = int(p.To.Reg)
		}
		o1 = AOP_IRR(c.opirr(p.As), uint32(p.To.Reg), uint32(r), uint32(v))

		r := int(p.Reg)
		if p.As == AMVN || p.As == AMVNW || isNEGop(p.As) {
			r = REGZERO
		} else if r == obj.REG_NONE {
			r = rt
		}
		o1 |= (uint32(r&31) << 5) | uint32(rt&31)

	case 4: /* mov $addcon, R; mov $recon, R; mov $racon, R; mov $addcon2, R */
		rt, r := p.To.Reg, o.param
		if r == obj.REG_NONE {
			r = REGZERO
		} else if r == REGFROM {
			r = p.From.Reg
		}
		if r == obj.REG_NONE {