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Results 1 - 10 of 20 for REG (0.02 sec)

  1. src/archive/tar/testdata/ustar-file-reg.tar

    Joe Tsai <******@****.***> 1443691829 -0700
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Fri Nov 06 04:31:26 UTC 2015
    - 1.5K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/parse.go

    	// Expect (SB), (FP), (PC), or (SP)
    	p.get('(')
    	reg := p.get(scanner.Ident).String()
    	p.get(')')
    	p.setPseudoRegister(a, reg, isStatic, prefix)
    }
    
    // setPseudoRegister sets the NAME field of addr for a pseudo-register reference such as (SB).
    func (p *Parser) setPseudoRegister(addr *obj.Addr, reg string, isStatic bool, prefix rune) {
    	if addr.Reg != 0 {
    		p.errorf("internal error: reg %s already set in pseudo", reg)
    	}
    	switch reg {
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Wed Sep 04 18:16:59 UTC 2024
    - 36.9K bytes
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  3. src/cmd/asm/internal/arch/arm64.go

    		}
    	} else if reg <= arm64.REG_V31 && reg >= arm64.REG_V0 {
    		switch ext {
    		case "B8":
    			if isIndex {
    				return errors.New("invalid register extension")
    			}
    			a.Reg = arm64.REG_ARNG + (reg & 31) + ((arm64.ARNG_8B & 15) << 5)
    		case "B16":
    			if isIndex {
    				return errors.New("invalid register extension")
    			}
    			a.Reg = arm64.REG_ARNG + (reg & 31) + ((arm64.ARNG_16B & 15) << 5)
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Thu Sep 29 09:04:58 UTC 2022
    - 10.4K bytes
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  4. src/cmd/asm/internal/asm/asm.go

    			// the CR bit.
    			prog.Reg = a[1].Reg
    			if a[1].Type != obj.TYPE_REG {
    				// The CR bit is represented as a constant 0-31. Convert it to a Reg.
    				c := p.getConstant(prog, op, &a[1])
    				reg, success := ppc64.ConstantToCRbit(c)
    				if !success {
    					p.errorf("invalid CR bit register number %d", c)
    				}
    				prog.Reg = reg
    			}
    			break
    		}
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Mon Oct 21 14:11:44 UTC 2024
    - 25.5K bytes
    - Viewed (0)
  5. src/cmd/asm/internal/asm/testdata/arm.s

    // MULL r1,r2,(hi,lo)
    //
    //	LTYPEM cond reg ',' reg ',' regreg
    //	{
    //		outcode($1, $2, &$3, int32($5.Reg), &$7);
    //	}
    	MULL	R1, R2, (R3,R4)
    
    //
    // MULA r1,r2,r3,r4: (r1*r2+r3) & 0xffffffff . r4
    // MULAW{T,B} r1,r2,r3,r4
    //
    //	LTYPEN cond reg ',' reg ',' reg ',' spreg
    //	{
    //		$7.Type = obj.TYPE_REGREG2;
    //		$7.Offset = int64($9);
    //		outcode($1, $2, &$3, int32($5.Reg), &$7);
    //	}
    	MULAWT	R1, R2, R3, R4
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Fri Dec 15 20:51:01 UTC 2023
    - 69K bytes
    - Viewed (0)
  6. src/cmd/asm/internal/lex/lex_test.go

    			"\tb\\",
    			"\tc",
    			"before",
    			"A(1, 2, 3)",
    			"after",
    		),
    		"before.\n.1.\n.2.\n.3.\n.after.\n",
    	},
    	{
    		"LOAD macro",
    		lines(
    			"#define LOAD(off, reg) \\",
    			"\tMOVBLZX	(off*4)(R12),	reg \\",
    			"\tADDB	reg,		DX",
    			"",
    			"LOAD(8, AX)",
    		),
    		"\n.\n.MOVBLZX.(.8.*.4.).(.R12.).,.AX.\n.ADDB.AX.,.DX.\n",
    	},
    	{
    		"nested multiline macro",
    		lines(
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Tue Aug 29 07:48:38 UTC 2023
    - 5.8K bytes
    - Viewed (0)
  7. internal/s3select/simdj/testdata/parking-citations-10.json.zst

    WAY","Route":"01521","Agency":1,"ViolationCode":"4000A1","ViolationDescr":"NO EVIDENCE OF REG","Fine":50,"Latitude":99999,"Longitude":99999} {"Ticket":1103700150,"IssueData":"2015-12-21T00:00:00","IssueTime":"1435","RPState":"CA","PlateExpiry":"201512","Make":"GMC","BodyStyle":"VN","Color":"WH","Location":"525 S MAIN ST","Route":"1C51","Agency":1,"ViolationCode":"4000A1","ViolationDescr":"NO EVIDENCE OF REG","Fine":50,"Latitude":99999,"Longitude":99999} {"Ticket":1104803000,"IssueData":"2015-12-...
    Registered: Sun Nov 03 19:28:11 UTC 2024
    - Last Modified: Tue Jun 01 21:59:40 UTC 2021
    - 693 bytes
    - Viewed (0)
  8. src/cmd/asm/internal/arch/arm.go

    		return true
    	}
    	return false
    }
    
    // IsARMBFX reports whether the op (as defined by an arm.A* constant) is one the
    // BFX-like instructions which are in the form of "op $width, $LSB, (Reg,) Reg".
    func IsARMBFX(op obj.As) bool {
    	switch op {
    	case arm.ABFX, arm.ABFXU, arm.ABFC, arm.ABFI:
    		return true
    	}
    	return false
    }
    
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Wed Oct 23 15:18:14 UTC 2024
    - 6.1K bytes
    - Viewed (0)
  9. schema/constraint.go

    package schema
    
    import (
    	"regexp"
    	"strings"
    
    	"gorm.io/gorm/clause"
    )
    
    // reg match english letters and midline
    var regEnLetterAndMidline = regexp.MustCompile(`^[\w-]+$`)
    
    type CheckConstraint struct {
    	Name       string
    	Constraint string // length(phone) >= 10
    	*Field
    }
    
    func (chk *CheckConstraint) GetName() string { return chk.Name }
    
    func (chk *CheckConstraint) Build() (sql string, vars []interface{}) {
    Registered: Sun Nov 03 09:35:10 UTC 2024
    - Last Modified: Mon Mar 18 07:33:54 UTC 2024
    - 1.9K bytes
    - Viewed (0)
  10. src/cmd/asm/internal/asm/testdata/mips64.s

    //	}
    	ABSD	F1, F2
    
    //	LFADD freg ',' freg
    //	{
    //		outcode(int($1), &$2, 0, &$4);
    //	}
    	ADDD	F1, F2
    
    //	LFADD freg ',' freg ',' freg
    //	{
    //		outcode(int($1), &$2, int($4.Reg), &$6);
    //	}
    	ADDD	F1, F2, F3
    
    //	LFCMP freg ',' freg
    //	{
    //		outcode(int($1), &$2, 0, &$4);
    //	}
    	CMPEQD	F1, F2
    
    
    //
    // WORD
    //
    	WORD	$1	// 00000001
    	NOOP		// 00000000
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Tue Aug 08 12:17:12 UTC 2023
    - 12.4K bytes
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