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Results 11 - 19 of 19 for ORQ (0.05 sec)
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src/cmd/compile/internal/ssa/_gen/AMD64.rules
// but ORQ is the only one I've actually seen occur. (ORQ (MOVQconst [c]) (MOVQconst [d])) => (MOVQconst [c|d]) // generic simplifications // TODO: more of this (ADDQ x (NEGQ y)) => (SUBQ x y) (ADDL x (NEGL y)) => (SUBL x y) (SUBQ x x) => (MOVQconst [0]) (SUBL x x) => (MOVLconst [0]) (ANDQ x x) => x (ANDL x x) => x (ORQ x x) => x (ORL x x) => x
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 12 19:38:41 UTC 2024 - 93.9K bytes - Viewed (0) -
test/codegen/bits.go
} func biton64(a, b uint64) (n uint64) { // amd64:"BTSQ" n += b | (1 << (a & 63)) // amd64:"BTSQ\t[$]63" n += a | (1 << 63) // amd64:"BTSQ\t[$]60" n += a | (1 << 60) // amd64:"ORQ\t[$]1" n += a | (1 << 0) return n } func bitoff64(a, b uint64) (n uint64) { // amd64:"BTRQ" n += b &^ (1 << (a & 63)) // amd64:"BTRQ\t[$]63" n += a &^ (1 << 63)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 7.8K bytes - Viewed (0) -
src/cmd/internal/obj/x86/anames.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 11 18:32:50 UTC 2023 - 19.1K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/amd64enc.s
ORQ DX, (BX) // 480913 ORQ R11, (BX) // 4c091b ORQ DX, (R11) // 490913 ORQ R11, (R11) // 4d091b ORQ DX, DX // 4809d2 or 480bd2 ORQ R11, DX // 4c09da or 490bd3 ORQ DX, R11 // 4909d3 or 4c0bda
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Oct 08 21:38:44 UTC 2021 - 581.9K bytes - Viewed (0) -
src/runtime/sys_linux_amd64.s
JEQ nog1 LEAQ m_tls(R13), R8 #ifdef GOOS_android // Android stores the TLS offset in runtime·tls_g. SUBQ runtime·tls_g(SB), R8 #else ADDQ $8, R8 // ELF wants to use -8(FS) #endif ORQ $0x00080000, DI //add flag CLONE_SETTLS(0x00080000) to call clone nog1: MOVL $SYS_clone, AX SYSCALL // In parent, return. CMPQ AX, $0 JEQ 3(PC) MOVL AX, ret+40(FP) RET
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Mar 24 18:53:44 UTC 2023 - 15.7K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteAMD64.go
v.reset(OpAMD64MOVQconst) v.AuxInt = int64ToAuxInt(c | d) return true } break } // match: (ORQ x x) // result: x for { x := v_0 if x != v_1 { break } v.copyOf(x) return true } // match: (ORQ x l:(MOVQload [off] {sym} ptr mem)) // cond: canMergeLoadClobber(v, l, x) && clobber(l) // result: (ORQload x [off] {sym} ptr mem)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 12 19:38:41 UTC 2024 - 712.7K bytes - Viewed (0) -
src/runtime/asm_amd64.s
GLOBL masks<>(SB),RODATA,$256 // func checkASM() bool TEXT ·checkASM(SB),NOSPLIT,$0-1 // check that masks<>(SB) and shifts<>(SB) are aligned to 16-byte MOVQ $masks<>(SB), AX MOVQ $shifts<>(SB), BX ORQ BX, AX TESTQ $15, AX SETEQ ret+0(FP) RET // these are arguments to pshufb. They move data down from // the high bytes of the register to the low bytes of the register.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sat May 11 20:38:24 UTC 2024 - 60.4K bytes - Viewed (0) -
src/vendor/golang.org/x/crypto/chacha20poly1305/chacha20poly1305_amd64.s
ADDQ 0+sStore, acc0 ADCQ 8+sStore, acc1 // Finally, constant time compare to the tag at the end of the message XORQ AX, AX MOVQ $1, DX XORQ (0*8)(inp), acc0 XORQ (1*8)(inp), acc1 ORQ acc1, acc0 CMOVQEQ DX, AX // Return true iff tags are equal MOVB AX, ret+96(FP) RET // ----------------------------------------------------------------------------
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Nov 29 21:28:33 UTC 2023 - 105.6K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/opGen.go
asm: x86.AANDL, reg: regInfo{ inputs: []inputInfo{ {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB }, }, }, { name: "ORQ", argLen: 2, commutative: true, resultInArg0: true, clobberFlags: true, asm: x86.AORQ, reg: regInfo{ inputs: []inputInfo{
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 1M bytes - Viewed (0)