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Results 1 - 10 of 22 for ORQ (0.02 sec)

  1. src/crypto/sha512/sha512block_amd64.s

    	ORQ   R11, DI
    
    	MOVQ  CX, R15
    	RORXQ $34, R9, R12
    	XORQ  R14, R13
    	XORQ  R8, R15
    
    	RORXQ $14, BX, R14
    	ANDQ  BX, R15
    	ADDQ  DX, AX
    	ANDQ  R10, DI
    
    	XORQ R14, R13
    	XORQ R8, R15
    
    	RORXQ $39, R9, R14
    	ADDQ  R13, R15
    
    	XORQ R12, R14
    	ADDQ R15, AX
    
    	RORXQ $28, R9, R12
    
    	XORQ R12, R14
    	MOVQ R9, R12
    	ANDQ R11, R12
    	ORQ  R12, DI
    
    	ADDQ R14, DX
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 27K bytes
    - Viewed (0)
  2. src/vendor/golang.org/x/crypto/sha3/keccakf_amd64.s

    	ROLQ $21, rBo;         \
    	MOVQ rBo, rT1;         \
    	ANDQ rBu, rT1;         \
    	XORQ rBi, rT1;         \
    	MOVQ rT1, _bi(oState); \
    	                       \
    	NOTQ rBi;              \
    	ORQ  rBa, rBu;         \
    	ORQ  rBo, rBi;         \
    	XORQ rBo, rBu;         \
    	XORQ rBe, rBi;         \
    	MOVQ rBu, _bo(oState); \
    	MOVQ rBi, _be(oState); \
    	B_RBI_RCE;             \
    	                       \
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Apr 10 16:37:53 UTC 2024
    - 14.2K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/testdata/amd64dynlinkerror.s

    	RET
    TEXT ·a9(SB), 0, $0-0
    	CMPL runtime·writeBarrier(SB), $0
    	ORQ R15, R15 // ERROR "when dynamic linking, R15 is clobbered by a global variable access and is used here"
    	RET
    TEXT ·a10(SB), 0, $0-0
    	CMPL runtime·writeBarrier(SB), $0
    	JEQ one
    	ORQ R15, R15 // ERROR "when dynamic linking, R15 is clobbered by a global variable access and is used here"
    one:
    	RET
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Mar 15 20:45:41 UTC 2023
    - 4.8K bytes
    - Viewed (0)
  4. src/math/hypot_amd64.s

    	ANDQ    AX, CX // q = |q|
    	MOVQ    $PosInf, AX
    	CMPQ    AX, BX
    	JLE     isInfOrNaN
    	CMPQ    AX, CX
    	JLE     isInfOrNaN
    	// hypot = max * sqrt(1 + (min/max)**2)
    	MOVQ    BX, X0
    	MOVQ    CX, X1
    	ORQ     CX, BX
    	JEQ     isZero
    	MOVAPD  X0, X2
    	MAXSD   X1, X0
    	MINSD   X2, X1
    	DIVSD   X0, X1
    	MULSD   X1, X1
    	ADDSD   $1.0, X1
    	SQRTSD  X1, X1
    	MULSD   X1, X0
    	MOVSD   X0, ret+16(FP)
    	RET
    isInfOrNaN:
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Apr 15 15:48:19 UTC 2021
    - 1.1K bytes
    - Viewed (0)
  5. src/math/dim_amd64.s

    	MOVQ    $PosInf, AX
    	MOVQ    R8, BX
    	ANDQ    DX, BX // x = |x|
    	CMPQ    AX, BX
    	JLT     isMaxNaN
    	MOVQ    R9, CX
    	ANDQ    DX, CX // y = |y|
    	CMPQ    AX, CX
    	JLT     isMaxNaN
    	// ±0 special cases
    	ORQ     CX, BX
    	JEQ     isMaxZero
    
    	MOVQ    R8, X0
    	MOVQ    R9, X1
    	MAXSD   X1, X0
    	MOVSD   X0, ret+16(FP)
    	RET
    isMaxNaN: // return NaN
    	MOVQ	$NaN, AX
    isPosInf: // return +Inf
    	MOVQ    AX, ret+16(FP)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Apr 15 15:48:19 UTC 2021
    - 1.9K bytes
    - Viewed (0)
  6. test/codegen/README

    matched. For example, the following test:
    
      func TZ8(n uint8) int {
      	   // amd64:"BSFQ","ORQ\t\\$256"
      	   return bits.TrailingZeros8(n)
      }
    
    verifies that the code generated for a bits.TrailingZeros8 call on
    amd64 contains both a "BSFQ" instruction and an "ORQ $256".
    
    Note how the ORQ regex includes a tab char (\t). In the Go assembly
    syntax, operands are separated from opcodes by a tabulation.
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Jul 18 19:55:29 UTC 2023
    - 5.2K bytes
    - Viewed (0)
  7. test/codegen/memops.go

    	x[i+3] &= v
    	// amd64: `ORQ\t[A-Z]+[0-9]*, 32\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*8\)`
    	x[i+4] |= v
    	// amd64: `XORQ\t[A-Z]+[0-9]*, 40\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*8\)`
    	x[i+5] ^= v
    
    	// amd64: `ADDQ\t[$]77, 48\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*8\)`
    	x[i+6] += 77
    	// amd64: `ANDQ\t[$]77, 56\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*8\)`
    	x[i+7] &= 77
    	// amd64: `ORQ\t[$]77, 64\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*8\)`
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Aug 04 16:40:24 UTC 2023
    - 12.5K bytes
    - Viewed (0)
  8. test/codegen/math.go

    	// s390x:"LPDFR",-"LDEBR",-"LEDBR"     (no float64 conversion)
    	return float32(math.Abs(float64(x)))
    }
    
    // Check that it's using integer registers
    func copysign(a, b, c float64) {
    	// amd64:"BTRQ\t[$]63","ANDQ","ORQ"
    	// s390x:"CPSDR",-"MOVD"         (no integer load/store)
    	// ppc64x:"FCPSGN"
    	// riscv64:"FSGNJD"
    	// wasm:"F64Copysign"
    	sink64[0] = math.Copysign(a, b)
    
    	// amd64:"BTSQ\t[$]63"
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Apr 04 15:24:29 UTC 2024
    - 6.2K bytes
    - Viewed (0)
  9. src/internal/bytealg/count_amd64.s

    	MOVQ R11, DI
    	VMOVDQU (DI), Y2
    	VMOVDQU 32(DI), Y4
    	VPCMPEQB Y1, Y2, Y3
    	VPCMPEQB Y1, Y4, Y5
    	VPMOVMSKB Y3, DX
    	VPMOVMSKB Y5, CX
    	// Exit AVX mode.
    	VZEROUPPER
    	SALQ $32, CX
    	ORQ CX, DX
    
    	// Create mask to ignore overlap between previous 64 byte block
    	// and the next.
    	ANDQ $63, BX
    	MOVQ $64, CX
    	SUBQ BX, CX
    	MOVQ $0xFFFFFFFFFFFFFFFF, R10
    	SALQ CL, R10
    	// Apply mask
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Oct 06 20:54:43 UTC 2023
    - 4.7K bytes
    - Viewed (0)
  10. src/cmd/compile/internal/ssa/_gen/AMD64Ops.go

    		{name: "ORQ", argLength: 2, reg: gp21, asm: "ORQ", commutative: true, resultInArg0: true, clobberFlags: true},                                                 // arg0 | arg1
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Aug 04 16:40:24 UTC 2023
    - 98K bytes
    - Viewed (1)
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