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Results 1 - 10 of 39 for R27 (0.43 sec)
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src/cmd/asm/internal/asm/testdata/arm64enc.s
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Jul 24 01:11:41 UTC 2023 - 43.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/mips64.s
SLLV R10, R22, R21 // 0156a814 SRL R27, R6, R17 // 03668806 SRLV R27, R6, R17 // 03668816 SRA R11, R19, R20 // 0173a007 SRAV R20, R19, R19 // 02939817 ROTR R19, R18, R20 // 0272a046 ROTRV R9, R13, R16 // 012d8056 // LSHW rreg ',' rreg // { // outcode(int($1), &$2, 0, &$4); // } SLL R1, R2 // 00221004 SLLV R10, R22 // 0156b014 SRL R27, R6 // 03663006 SRLV R27, R6 // 03663016
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Aug 08 12:17:12 UTC 2023 - 12.4K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/opGen.go
{2, 1073741816}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 g R23 R24 R25 R26 R27 R28 R29 R31 {0, 4611686019501129724}, // SP R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 g R23 R24 R25 R26 R27 R28 R29 R31 SB }, outputs: []outputInfo{ {0, 1071644664}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R23 R24 R25 R26 R27 R28 R29 R31
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 1M bytes - Viewed (0) -
test/codegen/clobberdead.go
package codegen type T [2]*int // contain pointer, not SSA-able (so locals are not registerized) var p1, p2, p3 T func F() { // 3735936685 is 0xdeaddead. On ARM64 R27 is REGTMP. // clobber x, y at entry. not clobber z (stack object). // amd64:`MOVL\t\$3735936685, command-line-arguments\.x`, `MOVL\t\$3735936685, command-line-arguments\.y`, -`MOVL\t\$3735936685, command-line-arguments\.z`
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 23:33:25 UTC 2023 - 1.3K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64.s
MSR R4, CNTP_CVAL_EL0 // 44e21bd5 MRS CNTP_TVAL_EL0, R27 // 1be23bd5 MSR R17, CNTP_TVAL_EL0 // 11e21bd5 MRS CNTV_CTL_EL0, R27 // 3be33bd5 MSR R2, CNTV_CTL_EL0 // 22e31bd5 MRS CNTV_CVAL_EL0, R16 // 50e33bd5 MSR R27, CNTV_CVAL_EL0 // 5be31bd5 MRS CNTV_TVAL_EL0, R12 // 0ce33bd5
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Dec 08 03:28:17 UTC 2023 - 94.9K bytes - Viewed (0) -
src/runtime/asm_arm64.s
// Caution: ugly multiline assembly macros in your future! #define DISPATCH(NAME,MAXSIZE) \ MOVD $MAXSIZE, R27; \ CMP R27, R16; \ BGT 3(PC); \ MOVD $NAME(SB), R27; \ B (R27) // Note: can't just "B NAME(SB)" - bad inlining results. TEXT ·reflectcall(SB), NOSPLIT|NOFRAME, $0-48 MOVWU frameSize+32(FP), R16 DISPATCH(runtime·call16, 16)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sat May 11 20:38:24 UTC 2024 - 43.4K bytes - Viewed (0) -
src/runtime/signal_ppc64x.go
print("r22 ", hex(c.r22()), "\t") print("r23 ", hex(c.r23()), "\n") print("r24 ", hex(c.r24()), "\t") print("r25 ", hex(c.r25()), "\n") print("r26 ", hex(c.r26()), "\t") print("r27 ", hex(c.r27()), "\n") print("r28 ", hex(c.r28()), "\t") print("r29 ", hex(c.r29()), "\n") print("r30 ", hex(c.r30()), "\t") print("r31 ", hex(c.r31()), "\n") print("pc ", hex(c.pc()), "\t")
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Sep 08 15:08:04 UTC 2023 - 3.7K bytes - Viewed (0) -
src/cmd/asm/internal/asm/operand_test.go
{"R17", "R17"}, {"R18", "R18"}, {"R19", "R19"}, {"R2", "R2"}, {"R20", "R20"}, {"R21", "R21"}, {"R22", "R22"}, {"R23", "R23"}, {"R24", "R24"}, {"R25", "R25"}, {"R26", "R26"}, {"R27", "R27"}, {"R28", "R28"}, {"R29", "R29"}, {"R3", "R3"}, {"R31", "R31"}, {"R4", "R4"}, {"R5", "R5"}, {"R6", "R6"}, {"R7", "R7"}, {"R8", "R8"}, {"R9", "R9"}, {"SPR(269)", "SPR(269)"},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Aug 29 18:31:05 UTC 2023 - 23.9K bytes - Viewed (0) -
src/runtime/mkduff.go
// R20: ptr to source memory // R21: ptr to destination memory // R26, R27 (aka REGTMP): scratch space // R20 and R21 are updated as a side effect fmt.Fprintln(w, "TEXT runtime·duffcopy<ABIInternal>(SB), NOSPLIT|NOFRAME, $0-0") for i := 0; i < 64; i++ { fmt.Fprintln(w, "\tLDP.P\t16(R20), (R26, R27)") fmt.Fprintln(w, "\tSTP.P\t(R26, R27), 16(R21)") fmt.Fprintln(w) } fmt.Fprintln(w, "\tRET") }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 21 19:04:21 UTC 2023 - 8K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64error.s
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Dec 08 03:28:17 UTC 2023 - 37.8K bytes - Viewed (0)