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Results 1 - 10 of 69 for r31 (0.05 sec)

  1. src/runtime/tls_ppc64x.s

    //
    // If !iscgo, this is a no-op.
    //
    // NOTE: setg_gcc<> assume this clobbers only R31.
    TEXT runtime·save_g(SB),NOSPLIT|NOFRAME,$0-0
    #ifndef GOOS_aix
    #ifndef GOOS_openbsd
    	MOVBZ	runtime·iscgo(SB), R31
    	CMP	R31, $0
    	BEQ	nocgo
    #endif
    #endif
    	MOVD	runtime·tls_g(SB), R31
    	MOVD	g, 0(R31)
    
    nocgo:
    	RET
    
    // load_g loads the g register from pthread-provided
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Aug 22 02:48:11 UTC 2023
    - 1.5K bytes
    - Viewed (0)
  2. src/runtime/mkpreempt.go

    		reg := fmt.Sprintf("R%d", i)
    		l.add("MOVD", reg, 8)
    	}
    	l.addSpecial(
    		"MOVW CR, R31\nMOVW R31, %d(R1)",
    		"MOVW %d(R1), R31\nMOVFL R31, $0xff", // this is MOVW R31, CR
    		8)                                    // CR is 4-byte wide, but just keep the alignment
    	l.addSpecial(
    		"MOVD XER, R31\nMOVD R31, %d(R1)",
    		"MOVD %d(R1), R31\nMOVD R31, XER",
    		8)
    	// Add floating point registers F0-F31.
    	for i := 0; i <= 31; i++ {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Nov 20 17:19:36 UTC 2023
    - 15.3K bytes
    - Viewed (0)
  3. src/runtime/preempt_ppc64x.s

    	MOVD 88(R1), R9
    	MOVD 80(R1), R8
    	MOVD 72(R1), R7
    	MOVD 64(R1), R6
    	MOVD 56(R1), R5
    	MOVD 48(R1), R4
    	MOVD 40(R1), R3
    	MOVD 520(R1), R31
    	MOVD R31, LR
    	MOVD 528(R1), R2
    	MOVD 536(R1), R12
    	MOVD (R1), R31
    	MOVD R31, CTR
    	MOVD 32(R1), R31
    	ADD $552, R1
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat Nov 06 10:24:44 UTC 2021
    - 2.7K bytes
    - Viewed (0)
  4. src/runtime/asm_ppc64x.s

    	// save scratch register R31 first
    	MOVD	R31, -184(R1)
    	MOVD	0(R1), R31
    	// save caller LR
    	MOVD	R31, -304(R1)
    	MOVD	-32(R1), R31
    	// save argument frame size
    	MOVD	R31, -192(R1)
    	MOVD	LR, R31
    	MOVD	R31, -320(R1)
    	ADD	$-320, R1
    	// save all registers that can contain pointers
    	// and the CR register
    	MOVW	CR, R31
    	MOVD	R31, 8(R1)
    	MOVD	R2, 24(R1)
    	MOVD	R3, 56(R1)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 18:17:17 UTC 2024
    - 45.4K bytes
    - Viewed (0)
  5. src/crypto/md5/md5block_ppc64x.s

    	ADD	R9, a; \
    	XOR	d, c, R31; \
    	XOR	b, R31; \
    	ADD	R31, a; \
    	ROTLW	$shift, a; \
    	ADD	b, a;
    
    #define ROUND4(a, b, c, d, index, const, shift) \
    	ADD	$const, index, R9; \
    	ADD	R9, a; \
    	ORN     d, b, R31; \
    	XOR	c, R31; \
    	ADD	R31, a; \
    	ROTLW	$shift, a; \
    	ADD	b, a;
    
    
    TEXT ·block(SB),NOSPLIT,$0-32
    	MOVD	dig+0(FP), R10
    	MOVD	p+8(FP), R6
    	MOVD	p_len+16(FP), R5
    
    	// We assume p_len >= 64
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 20 18:05:32 UTC 2024
    - 5.3K bytes
    - Viewed (0)
  6. src/runtime/cgo/abi_loong64.h

    //
    // These macros save and restore the callee-saved registers
    // from the stack, but they don't adjust stack pointer, so
    // the user should prepare stack space in advance.
    // SAVE_R22_TO_R31(offset) saves R22 ~ R31 to the stack space
    // of ((offset)+0*8)(R3) ~ ((offset)+9*8)(R3).
    //
    // SAVE_F24_TO_F31(offset) saves F24 ~ F31 to the stack space
    // of ((offset)+0*8)(R3) ~ ((offset)+7*8)(R3).
    //
    // Note: g is R22
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Mar 29 02:34:18 UTC 2023
    - 1.9K bytes
    - Viewed (0)
  7. src/runtime/cgo/asm_mips64x.s

    	BGEZAL	R0, 1(PC)
    	SRLV	$32, R31, RSB
    	SLLV	$32, RSB
    	JAL	runtime·load_g(SB)
    
    	JAL	runtime·cgocallback(SB)
    
    	MOVV	(8*4)(R29), R16
    	MOVV	(8*5)(R29), R17
    	MOVV	(8*6)(R29), R18
    	MOVV	(8*7)(R29), R19
    	MOVV	(8*8)(R29), R20
    	MOVV	(8*9)(R29), R21
    	MOVV	(8*10)(R29), R22
    	MOVV	(8*11)(R29), R23
    	MOVV	(8*12)(R29), RSB
    	MOVV	(8*13)(R29), g
    	MOVV	(8*14)(R29), R31
    #ifndef GOMIPS64_softfloat
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 12 00:43:51 UTC 2023
    - 2.5K bytes
    - Viewed (0)
  8. src/runtime/signal_loong64.go

    	print("r26  ", hex(c.r26()), "\t")
    	print("r27  ", hex(c.r27()), "\n")
    	print("r28  ", hex(c.r28()), "\t")
    	print("r29  ", hex(c.r29()), "\n")
    	print("r30  ", hex(c.r30()), "\t")
    	print("r31  ", hex(c.r31()), "\n")
    	print("pc   ", hex(c.pc()), "\t")
    	print("link ", hex(c.link()), "\n")
    }
    
    //go:nosplit
    //go:nowritebarrierrec
    func (c *sigctxt) sigpc() uintptr { return uintptr(c.pc()) }
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 21 06:51:28 UTC 2023
    - 3K bytes
    - Viewed (0)
  9. src/runtime/cgo/abi_ppc64x.h

    //
    // On PPC64/ELFv2 targets, the following registers are callee
    // saved when called from C. They must be preserved before
    // calling into Go which does not preserve any of them.
    //
    //	R14-R31
    //	CR2-4
    //	VR20-31
    //	F14-F31
    //
    // xcoff(aix) and ELFv1 are similar, but may only require a
    // subset of these.
    //
    // These macros assume a 16 byte aligned stack pointer. This
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Apr 03 20:17:02 UTC 2023
    - 6.6K bytes
    - Viewed (0)
  10. src/runtime/cgo/asm_mipsx.s

    	MOVW	R16, (4*4)(R29)
    	MOVW	R17, (4*5)(R29)
    	MOVW	R18, (4*6)(R29)
    	MOVW	R19, (4*7)(R29)
    	MOVW	R20, (4*8)(R29)
    	MOVW	R21, (4*9)(R29)
    	MOVW	R22, (4*10)(R29)
    	MOVW	R23, (4*11)(R29)
    	MOVW	g, (4*12)(R29)
    	MOVW	R31, (4*13)(R29)
    #ifndef GOMIPS_softfloat
    	MOVD	F20, (4*14)(R29)
    	MOVD	F22, (4*14+8*1)(R29)
    	MOVD	F24, (4*14+8*2)(R29)
    	MOVD	F26, (4*14+8*3)(R29)
    	MOVD	F28, (4*14+8*4)(R29)
    	MOVD	F30, (4*14+8*5)(R29)
    #endif
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 12 00:43:51 UTC 2023
    - 2.4K bytes
    - Viewed (0)
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