BCL $20,CR0LT,$1,LR             // 4e800821
	BCL $20,CR0LT,$0,LR             // 4e800021
	BCL $20,CR0LT,LR                // 4e800021
	BCL $20,CR0GT,LR                // 4e810021
	BCL 20,CR0LT,LR                 // BCL $20,CR0LT,LR // 4e800021
	BCL 20,undefined_symbol,LR      // BCL $20,CR0LT,LR // 4e800021
	BCL 20,undefined_symbol+1,LR    // BCL $20,CR0GT,LR // 4e810021

// with the core of the assembler.

package arch

import (
	"cmd/internal/obj/s390x"
)

func jumpS390x(word string) bool {
	switch word {
	case "BRC",
		"BC",
		"BCL",
		"BEQ",
		"BGE",
		"BGT",
		"BL",
		"BLE",
		"BLEU",
		"BLT",
		"BLTU",
		"BNE",
		"BR",
		"BVC",
		"BVS",
		"BRCT",
		"BRCTG",
		"CMPBEQ",
		"CMPBGE",
		"CMPBGT",

// with the core of the assembler.

package arch

import (
	"cmd/internal/obj"
	"cmd/internal/obj/ppc64"
)

func jumpPPC64(word string) bool {
	switch word {
	case "BC", "BCL", "BEQ", "BGE", "BGT", "BL", "BLE", "BLT", "BNE", "BR", "BVC", "BVS", "BDNZ", "BDZ", "CALL", "JMP":
		return true
	}
	return false
}

// IsPPC64CMP reports whether the op (as defined by an ppc64.A* constant) is

	"ADDMEV",
	"ADDE",
	"ADDECC",
	"ADDEVCC",
	"ADDEV",
	"ADDZE",
	"ADDZECC",
	"ADDZEVCC",
	"ADDZEV",
	"ADDEX",
	"AND",
	"ANDCC",
	"ANDN",
	"ANDNCC",
	"ANDISCC",
	"BC",
	"BCL",
	"BEQ",
	"BGE",
	"BGT",
	"BLE",
	"BLT",
	"BNE",
	"BVC",
	"BVS",
	"BDNZ",
	"BDZ",
	"CMP",
	"CMPU",
	"CMPEQB",
	"CNTLZW",
	"CNTLZWCC",
	"CRAND",
	"CRANDN",
	"CREQV",

		return "error: unknown instruction"
	}

	PC := pc
	// Special handling for some ops
	startArg := 0
	sep := " "
	opName := inst.Op.String()
	argList := inst.Args[:]

	switch opName {
	case "bc", "bcl", "bca", "bcla", "bclr", "bclrl", "bcctr", "bcctrl", "bctar", "bctarl":
		sfx := inst.Op.String()[2:]
		bo := int(inst.Args[0].(Imm))
		bi := inst.Args[1].(CondReg)
		atsfx := [4]string{"", "?", "-", "+"}

	"CLFDBR",
	"CLGEBR",
	"CLGDBR",
	"CMP",
	"CMPU",
	"CMPW",
	"CMPWU",
	"TMHH",
	"TMHL",
	"TMLH",
	"TMLL",
	"IPM",
	"SPM",
	"CS",
	"CSG",
	"SYNC",
	"BC",
	"BCL",
	"BRC",
	"BEQ",
	"BGE",
	"BGT",
	"BLE",
	"BLT",
	"BLEU",
	"BLTU",
	"BNE",
	"BVC",
	"BVS",
	"SYSCALL",
	"BRCT",
	"BRCTG",
	"CRJ",
	"CGRJ",
	"CLRJ",

	OP_MFLR_R0       = OP_MFLR | 0<<21            // mflr r0
	OP_MTLR_R0       = OP_MTLR | 0<<21            // mtlr r0

	// This is a special, preferred form of bcl to obtain the next
	// instruction address (NIA, aka PC+4) in LR.
	OP_BCL_NIA = OP_BCL | 20<<21 | 31<<16 | 1<<2 // bcl 20,31,$+4

	// Masks to match opcodes
	MASK_PLD_PFX  = 0xfff70000
	MASK_PLD_SFX  = 0xfc1f0000 // Also checks RA = 0 if check value is OP_PLD_SFX.

		}
		return op + " " + strings.Join(args, ", ")
	case BCCTRL:
		if int(inst.Args[0].(Imm))&20 == 20 { // unconditional
			return "BL (CTR)"
		}
		return op + " " + strings.Join(args, ",")
	case BCA, BCL, BCLA, BCLRL, BCTAR, BCTARL:
		return op + " " + strings.Join(args, ",")
	}
}

// plan9Arg formats arg (which is the argIndex's arg in inst) according to Plan 9 rules.
//

	ANDISCC:        "andis.",
	B:              "b",
	BA:             "ba",
	BL:             "bl",
	BLA:            "bla",
	BC:             "bc",
	BCA:            "bca",
	BCL:            "bcl",
	BCLA:           "bcla",
	BCCTR:          "bcctr",
	BCCTRL:         "bcctrl",
	BCLR:           "bclr",
	BCLRL:          "bclrl",
	CMPW:           "cmpw",
	CMPD:           "cmpd",

			v &^= 03
		}

		if v < -(1<<16) || v >= 1<<15 {
			c.ctxt.Diag("branch too far\n%v", p)
		}
		o1 = OP_BC(c.opirr(p.As), uint32(a), uint32(r), uint32(v), 0)

	case 18: /* br/bl (lr/ctr); bc/bcl bo,bi,(lr/ctr) */
		var v int32
		var bh uint32 = 0
		if p.As == ABC || p.As == ABCL {
			v = c.regoff(&p.From) & 31
		} else {
			v = 20 /* unconditional */
		}
		r := int(p.Reg)
		if r == 0 {