Search Options

Results per page
Sort
Preferred Languages
Advance

Results 1 - 8 of 8 for R16 (0.04 sec)

  1. src/cmd/asm/internal/asm/testdata/mips64.s

    //	}
    	MOVH	R16, R27	// 0010dc00001bdc03
    	MOVHU	R1, R3		// 3023ffff
    
    //	LMOVB rreg ',' rreg
    //	{
    //		outcode(int($1), &$2, 0, &$4);
    //	}
    	MOVB	R8, R9		// 00084e0000094e03
    	MOVBU	R12, R17	// 319100ff
    
    //	LMOVV addr ',' rreg
    //	{
    //		outcode(int($1), &$2, 0, &$4);
    //	}
    	MOVV	foo<>+3(SB), R2
    	MOVV	(R5), R18	// dcb20000
    	MOVV	8(R16), R4	// de040008
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Tue Aug 08 12:17:12 UTC 2023
    - 12.4K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/arm64enc.s

    	CSETM VS, R4                               // e4739fda
    	CSINCW LE, R5, R24, R26                    // bad4981a
    	CSINC VS, R26, R16, R17                    // 5167909a
    	CSINVW AL, R23, R21, R5                    // e5e2955a
    	CSINV LO, R2, R11, R14                     // 4e308bda
    	CSNEGW HS, R16, R29, R10                   // 0a269d5a
    	CSNEG NE, R21, R19, R11                    // ab1693da
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Mon Jul 24 01:11:41 UTC 2023
    - 43.9K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/testdata/arm64error.s

    	ADDS	R7@>2, R5, R16                                   // ERROR "unsupported shift operator"
    	ADDSW	R7@>2, R5, R16                                   // ERROR "unsupported shift operator"
    	SUB	R7@>2, R5, R16                                   // ERROR "unsupported shift operator"
    	SUBW	R7@>2, R5, R16                                   // ERROR "unsupported shift operator"
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Wed Mar 26 10:48:50 UTC 2025
    - 37.9K bytes
    - Viewed (0)
  4. src/cmd/asm/internal/asm/operand_test.go

    	{"F29", "F29"},
    	{"F30", "F30"},
    	{"F31", "F31"},
    	{"LR", "LR"},
    	{"R0", "R0"},
    	{"R1", "R1"},
    	{"R11", "R11"},
    	{"R12", "R12"},
    	{"R13", "R13"},
    	{"R14", "R14"},
    	{"R15", "R15"},
    	{"R16", "R16"},
    	{"R17", "R17"},
    	{"R18", "R18"},
    	{"R19", "R19"},
    	{"R2", "R2"},
    	{"R20", "R20"},
    	{"R21", "R21"},
    	{"R22", "R22"},
    	{"R23", "R23"},
    	{"R24", "R24"},
    	{"R25", "R25"},
    	{"R26", "R26"},
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Tue Aug 29 18:31:05 UTC 2023
    - 23.9K bytes
    - Viewed (0)
  5. src/cmd/asm/internal/asm/testdata/arm64.s

    	LDAXPW	(R10), (R20, R16)                    // 54c17f88
    	LDAXP	(R25), (R30, R11)                    // 3eaf7fc8
    	LDAXRW	(R0), R2                             // 02fc5f88
    	LDXPW	(R24), (R23, R11)                    // 172f7f88
    	LDXP	(R0), (R16, R13)                     // 10347fc8
    	STLRB	R11, (R22)                           // cbfe9f08
    	STLRH	R16, (R23)                           // f0fe9f48
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Wed Mar 26 10:48:50 UTC 2025
    - 95.3K bytes
    - Viewed (0)
  6. src/bytes/bytes_test.go

    		buf[n-2] = '\x00'
    		buf[n-1] = '\x00'
    	}
    }
    
    func bmIndexRuneUnicode(rt *unicode.RangeTable, needle rune) func(b *testing.B, n int) {
    	var rs []rune
    	for _, r16 := range rt.R16 {
    		for r := rune(r16.Lo); r <= rune(r16.Hi); r += rune(r16.Stride) {
    			if r != needle {
    				rs = append(rs, r)
    			}
    		}
    	}
    	for _, r32 := range rt.R32 {
    		for r := rune(r32.Lo); r <= rune(r32.Hi); r += rune(r32.Stride) {
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Mon Jul 28 18:13:58 UTC 2025
    - 62.9K bytes
    - Viewed (0)
  7. lib/fips140/v1.0.0.zip

    STXVLL V25, BLK_OUT, R17 #else ADD $32, R1, MASK_PTR MOVD $0, R16 P8_STXVB16X(V15, MASK_PTR, R0) CMP IN_LEN, $8 BLT next4 MOVD 0(MASK_PTR), R14 MOVD 0(BLK_INP), R15 XOR R14, R15, R14 MOVD R14, 0(BLK_OUT) ADD $8, R16 ADD $-8, IN_LEN next4: CMP IN_LEN, $4 BLT next2 MOVWZ (BLK_INP)(R16), R15 MOVWZ (MASK_PTR)(R16), R14 XOR R14, R15, R14 MOVW R14, (R16)(BLK_OUT) ADD $4, R16 ADD $-4, IN_LEN next2: CMP IN_LEN, $2 BLT next1 MOVHZ (BLK_INP)(R16), R15 MOVHZ (MASK_PTR)(R16), R14 XOR R14, R15, R14 MOVH R14, (R16)(BLK_OUT)...
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Wed Jan 29 15:10:35 UTC 2025
    - 635K bytes
    - Viewed (0)
  8. src/cmd/asm/internal/asm/testdata/loong64enc1.s

    	// Duplicate general-purpose register to vector
    	VMOVQ		R4, V2.B16      // 82009f72
    	VMOVQ		R5, V3.H8       // a3049f72
    	VMOVQ		R6, V4.W4       // c4089f72
    	VMOVQ		R7, V5.V2       // e50c9f72
    	XVMOVQ		R16, X31.B32    // 1f029f76
    	XVMOVQ		R17, X28.H16    // 3c069f76
    	XVMOVQ		R18, X10.W8     // 4a0a9f76
    	XVMOVQ		R19, X9.V4      // 690e9f76
    
    	// Move vector
    	XVMOVQ		X0, X31.B32     // 1f000777
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Thu Sep 04 19:24:25 UTC 2025
    - 35.5K bytes
    - Viewed (0)
Back to top