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Results 1 - 10 of 68 for shr2 (0.06 sec)

  1. src/cmd/compile/internal/ssa/_gen/AMD64.rules

    ((SHLL|SHRL|SARL) x (NEGQ <t> (ADDQconst [c] y))) && c & 31 == 0  => ((SHLL|SHRL|SARL) x (NEGQ <t> y))
    ((SHLL|SHRL|SARL) x (ANDQconst [c] y)) && c & 31 == 31 => ((SHLL|SHRL|SARL) x y)
    ((SHLL|SHRL|SARL) x (NEGQ <t> (ANDQconst [c] y))) && c & 31 == 31 => ((SHLL|SHRL|SARL) x (NEGQ <t> y))
    
    ((SHLQ|SHRQ|SARQ) x (ADDLconst [c] y)) && c & 63 == 0  => ((SHLQ|SHRQ|SARQ) x y)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 12 19:38:41 UTC 2024
    - 93.9K bytes
    - Viewed (0)
  2. test/codegen/arithmetic.go

    // optimized into shifts and ands
    
    func LenDiv1(a []int) int {
    	// 386:"SHRL\t[$]10"
    	// amd64:"SHRQ\t[$]10"
    	// arm64:"LSR\t[$]10",-"SDIV"
    	// arm:"SRL\t[$]10",-".*udiv"
    	// ppc64x:"SRD"\t[$]10"
    	return len(a) / 1024
    }
    
    func LenDiv2(s string) int {
    	// 386:"SHRL\t[$]11"
    	// amd64:"SHRQ\t[$]11"
    	// arm64:"LSR\t[$]11",-"SDIV"
    	// arm:"SRL\t[$]11",-".*udiv"
    	// ppc64x:"SRD\t[$]11"
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri May 17 15:28:00 UTC 2024
    - 15.2K bytes
    - Viewed (0)
  3. src/cmd/internal/notsha256/sha256block_386.s

    //   SIGMA0(x) = ROTR(7,x) XOR ROTR(18,x) XOR SHR(3,x)
    //   SIGMA1(x) = ROTR(17,x) XOR ROTR(19,x) XOR SHR(10,x)
    #define MSGSCHEDULE1(index) \
    	MOVL	((index-2)*4)(BP), AX; \
    	MOVL	AX, CX; \
    	RORL	$17, AX; \
    	MOVL	CX, DX; \
    	RORL	$19, CX; \
    	SHRL	$10, DX; \
    	MOVL	((index-15)*4)(BP), BX; \
    	XORL	CX, AX; \
    	MOVL	BX, CX; \
    	XORL	DX, AX; \
    	RORL	$7, BX; \
    	MOVL	CX, DX; \
    	SHRL	$3, DX; \
    	RORL	$18, CX; \
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:27 UTC 2023
    - 8.2K bytes
    - Viewed (0)
  4. src/cmd/compile/internal/ssa/rewriteAMD64latelower.go

    		}
    		v.reset(OpAMD64SHLXQ)
    		v.AddArg2(x, y)
    		return true
    	}
    	return false
    }
    func rewriteValueAMD64latelower_OpAMD64SHRL(v *Value) bool {
    	v_1 := v.Args[1]
    	v_0 := v.Args[0]
    	// match: (SHRL x y)
    	// cond: buildcfg.GOAMD64 >= 3
    	// result: (SHRXL x y)
    	for {
    		x := v_0
    		y := v_1
    		if !(buildcfg.GOAMD64 >= 3) {
    			break
    		}
    		v.reset(OpAMD64SHRXL)
    		v.AddArg2(x, y)
    		return true
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 12 19:38:41 UTC 2024
    - 3.6K bytes
    - Viewed (0)
  5. test/codegen/memcombine.go

    	// s390x:"STMG"
    	p[0] = x
    	// s390x:-"STMG",-"MOVD"
    	p[1] = y
    }
    
    func store32le(p *struct{ a, b uint32 }, x uint64) {
    	// amd64:"MOVQ",-"MOVL",-"SHRQ"
    	// arm64:"MOVD",-"MOVW",-"LSR"
    	// ppc64le:"MOVD",-"MOVW",-"SRD"
    	p.a = uint32(x)
    	// amd64:-"MOVL",-"SHRQ"
    	// arm64:-"MOVW",-"LSR"
    	// ppc64le:-"MOVW",-"SRD"
    	p.b = uint32(x >> 32)
    }
    func store32be(p *struct{ a, b uint32 }, x uint64) {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Mar 21 19:45:41 UTC 2024
    - 29.7K bytes
    - Viewed (0)
  6. src/cmd/internal/notsha256/sha256block_amd64.s

    //   SIGMA0(x) = ROTR(7,x) XOR ROTR(18,x) XOR SHR(3,x)
    //   SIGMA1(x) = ROTR(17,x) XOR ROTR(19,x) XOR SHR(10,x)
    #define MSGSCHEDULE1(index) \
    	MOVL	((index-2)*4)(BP), AX; \
    	MOVL	AX, CX; \
    	RORL	$17, AX; \
    	MOVL	CX, DX; \
    	RORL	$19, CX; \
    	SHRL	$10, DX; \
    	MOVL	((index-15)*4)(BP), BX; \
    	XORL	CX, AX; \
    	MOVL	BX, CX; \
    	XORL	DX, AX; \
    	RORL	$7, BX; \
    	MOVL	CX, DX; \
    	SHRL	$3, DX; \
    	RORL	$18, CX; \
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:27 UTC 2023
    - 14K bytes
    - Viewed (0)
  7. docs/ftp/README.md

    ssh-ed25519
    ******@****.***
    sk-ecdsa-sha2******@****.***
    ecdsa-sha2-nistp256
    ecdsa-sha2-nistp384
    ecdsa-sha2-nistp521
    rsa-sha2-256
    rsa-sha2-512
    ssh-rsa
    ssh-dss
    ```
    
    `--sftp=kex-algos=...` specifies the supported key-exchange algorithms in preference order.
    
    Valid values: 
    
    ```
    curve25519-sha256
    ******@****.***
    ecdh-sha2-nistp256
    ecdh-sha2-nistp384
    Registered: Sun Jun 16 00:44:34 UTC 2024
    - Last Modified: Tue May 07 06:41:25 UTC 2024
    - 7.8K bytes
    - Viewed (0)
  8. src/crypto/internal/edwards25519/field/fe_amd64.s

    	ADDQ   R10, R13
    	ANDQ   AX, R15
    	ADDQ   R12, R15
    
    	// Second reduction chain (carryPropagate)
    	MOVQ   DI, SI
    	SHRQ   $0x33, SI
    	MOVQ   R9, R8
    	SHRQ   $0x33, R8
    	MOVQ   R11, R10
    	SHRQ   $0x33, R10
    	MOVQ   R13, R12
    	SHRQ   $0x33, R12
    	MOVQ   R15, R14
    	SHRQ   $0x33, R14
    	ANDQ   AX, DI
    	IMUL3Q $0x13, R14, R14
    	ADDQ   R14, DI
    	ANDQ   AX, R9
    	ADDQ   SI, R9
    	ANDQ   AX, R11
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 5.7K bytes
    - Viewed (0)
  9. src/cmd/compile/internal/ssa/_gen/AMD64latelower.rules

    (MOVLQZX x) && zeroUpper32Bits(x,3)...
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 12 19:38:41 UTC 2024
    - 636 bytes
    - Viewed (0)
  10. src/crypto/internal/edwards25519/field/_asm/fe_amd64_asm.go

    	Comment("Second reduction chain (carryPropagate)")
    	// c0 = r0 >> 51
    	MOVQ(r0lo, c0)
    	SHRQ(Imm(51), c0)
    	// c1 = r1 >> 51
    	MOVQ(r1lo, c1)
    	SHRQ(Imm(51), c1)
    	// c2 = r2 >> 51
    	MOVQ(r2lo, c2)
    	SHRQ(Imm(51), c2)
    	// c3 = r3 >> 51
    	MOVQ(r3lo, c3)
    	SHRQ(Imm(51), c3)
    	// c4 = r4 >> 51
    	MOVQ(r4lo, c4)
    	SHRQ(Imm(51), c4)
    	maskAndAdd(r0lo, maskLow51Bits, c4, 19)
    	maskAndAdd(r1lo, maskLow51Bits, c0, 1)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 7.2K bytes
    - Viewed (0)
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