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Results 1 - 9 of 9 for SIGMA0 (0.09 sec)

  1. src/crypto/sha256/sha256block_386.s

    // H6 = g + H6
    // H7 = h + H7
    
    // Wt = Mt; for 0 <= t <= 15
    #define MSGSCHEDULE0(index) \
    	MOVL	(index*4)(SI), AX; \
    	BSWAPL	AX; \
    	MOVL	AX, (index*4)(BP)
    
    // Wt = SIGMA1(Wt-2) + Wt-7 + SIGMA0(Wt-15) + Wt-16; for 16 <= t <= 63
    //   SIGMA0(x) = ROTR(7,x) XOR ROTR(18,x) XOR SHR(3,x)
    //   SIGMA1(x) = ROTR(17,x) XOR ROTR(19,x) XOR SHR(10,x)
    #define MSGSCHEDULE1(index) \
    	MOVL	((index-2)*4)(BP), AX; \
    	MOVL	AX, CX; \
    	RORL	$17, AX; \
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 8.2K bytes
    - Viewed (0)
  2. src/cmd/internal/notsha256/sha256block_386.s

    // H6 = g + H6
    // H7 = h + H7
    
    // Wt = Mt; for 0 <= t <= 15
    #define MSGSCHEDULE0(index) \
    	MOVL	(index*4)(SI), AX; \
    	BSWAPL	AX; \
    	MOVL	AX, (index*4)(BP)
    
    // Wt = SIGMA1(Wt-2) + Wt-7 + SIGMA0(Wt-15) + Wt-16; for 16 <= t <= 63
    //   SIGMA0(x) = ROTR(7,x) XOR ROTR(18,x) XOR SHR(3,x)
    //   SIGMA1(x) = ROTR(17,x) XOR ROTR(19,x) XOR SHR(10,x)
    #define MSGSCHEDULE1(index) \
    	MOVL	((index-2)*4)(BP), AX; \
    	MOVL	AX, CX; \
    	RORL	$17, AX; \
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:27 UTC 2023
    - 8.2K bytes
    - Viewed (0)
  3. src/crypto/sha512/sha512block_riscv64.s

    	SLL	$24, X9; \
    	OR	X5, X9, X5; \
    	SLL	$16, X6; \
    	OR	X5, X6, X5; \
    	SLL	$8, X7; \
    	OR	X5, X7, X5; \
    	OR	X5, X8, X5; \
    	MOV	X5, (index*8)(X19)
    
    // Wt = SIGMA1(Wt-2) + Wt-7 + SIGMA0(Wt-15) + Wt-16; for 16 <= t <= 79
    //   SIGMA0(x) = ROTR(1,x) XOR ROTR(8,x) XOR SHR(7,x)
    //   SIGMA1(x) = ROTR(19,x) XOR ROTR(61,x) XOR SHR(6,x)
    #define MSGSCHEDULE1(index) \
    	MOV	(((index-2)&0xf)*8)(X19), X5; \
    	MOV	(((index-15)&0xf)*8)(X19), X6; \
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Mar 07 14:57:07 UTC 2024
    - 9.1K bytes
    - Viewed (0)
  4. src/cmd/internal/notsha256/sha256block_amd64.s

    // H6 = g + H6
    // H7 = h + H7
    
    // Wt = Mt; for 0 <= t <= 15
    #define MSGSCHEDULE0(index) \
    	MOVL	(index*4)(SI), AX; \
    	BSWAPL	AX; \
    	MOVL	AX, (index*4)(BP)
    
    // Wt = SIGMA1(Wt-2) + Wt-7 + SIGMA0(Wt-15) + Wt-16; for 16 <= t <= 63
    //   SIGMA0(x) = ROTR(7,x) XOR ROTR(18,x) XOR SHR(3,x)
    //   SIGMA1(x) = ROTR(17,x) XOR ROTR(19,x) XOR SHR(10,x)
    #define MSGSCHEDULE1(index) \
    	MOVL	((index-2)*4)(BP), AX; \
    	MOVL	AX, CX; \
    	RORL	$17, AX; \
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:27 UTC 2023
    - 14K bytes
    - Viewed (0)
  5. src/crypto/sha512/sha512block_amd64.s

    // H6 = g + H6
    // H7 = h + H7
    
    // Wt = Mt; for 0 <= t <= 15
    #define MSGSCHEDULE0(index) \
    	MOVQ	(index*8)(SI), AX; \
    	BSWAPQ	AX; \
    	MOVQ	AX, (index*8)(BP)
    
    // Wt = SIGMA1(Wt-2) + Wt-7 + SIGMA0(Wt-15) + Wt-16; for 16 <= t <= 79
    //   SIGMA0(x) = ROTR(1,x) XOR ROTR(8,x) XOR SHR(7,x)
    //   SIGMA1(x) = ROTR(19,x) XOR ROTR(61,x) XOR SHR(6,x)
    #define MSGSCHEDULE1(index) \
    	MOVQ	((index-2)*8)(BP), AX; \
    	MOVQ	AX, CX; \
    	RORQ	$19, AX; \
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 27K bytes
    - Viewed (0)
  6. src/crypto/sha256/sha256block_ppc64x.s

    //
    // The algorithm is detailed in FIPS 180-4:
    //
    //  https://csrc.nist.gov/publications/fips/fips180-4/fips-180-4.pdf
    //
    // Wt = Mt; for 0 <= t <= 15
    // Wt = SIGMA1(Wt-2) + SIGMA0(Wt-15) + Wt-16; for 16 <= t <= 63
    //
    // a = H0
    // b = H1
    // c = H2
    // d = H3
    // e = H4
    // f = H5
    // g = H6
    // h = H7
    //
    // for t = 0 to 63 {
    //    T1 = h + BIGSIGMA1(e) + Ch(e,f,g) + Kt + Wt
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 14.4K bytes
    - Viewed (0)
  7. src/crypto/sha256/sha256block_amd64.s

    // H6 = g + H6
    // H7 = h + H7
    
    // Wt = Mt; for 0 <= t <= 15
    #define MSGSCHEDULE0(index) \
    	MOVL	(index*4)(SI), AX; \
    	BSWAPL	AX; \
    	MOVL	AX, (index*4)(BP)
    
    // Wt = SIGMA1(Wt-2) + Wt-7 + SIGMA0(Wt-15) + Wt-16; for 16 <= t <= 63
    //   SIGMA0(x) = ROTR(7,x) XOR ROTR(18,x) XOR SHR(3,x)
    //   SIGMA1(x) = ROTR(17,x) XOR ROTR(19,x) XOR SHR(10,x)
    #define MSGSCHEDULE1(index) \
    	MOVL	((index-2)*4)(BP), AX; \
    	MOVL	AX, CX; \
    	RORL	$17, AX; \
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 47.3K bytes
    - Viewed (0)
  8. src/cmd/internal/notsha256/sha256block_ppc64x.s

    //
    // The algorithm is detailed in FIPS 180-4:
    //
    //  https://csrc.nist.gov/publications/fips/fips180-4/fips-180-4.pdf
    //
    // Wt = Mt; for 0 <= t <= 15
    // Wt = SIGMA1(Wt-2) + SIGMA0(Wt-15) + Wt-16; for 16 <= t <= 63
    //
    // a = H0
    // b = H1
    // c = H2
    // d = H3
    // e = H4
    // f = H5
    // g = H6
    // h = H7
    //
    // for t = 0 to 63 {
    //    T1 = h + BIGSIGMA1(e) + Ch(e,f,g) + Kt + Wt
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:27 UTC 2023
    - 14.5K bytes
    - Viewed (0)
  9. src/crypto/sha512/sha512block_ppc64x.s

    //
    // The algorithm is detailed in FIPS 180-4:
    //
    //  https://csrc.nist.gov/publications/fips/fips180-4/fips-180-4.pdf
    //
    // Wt = Mt; for 0 <= t <= 15
    // Wt = SIGMA1(Wt-2) + SIGMA0(Wt-15) + Wt-16; for 16 <= t <= 79
    //
    // a = H0
    // b = H1
    // c = H2
    // d = H3
    // e = H4
    // f = H5
    // g = H6
    // h = H7
    //
    // for t = 0 to 79 {
    //    T1 = h + BIGSIGMA1(e) + Ch(e,f,g) + Kt + Wt
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 15.8K bytes
    - Viewed (0)
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