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Results 1 - 3 of 3 for r8 (0.03 sec)
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src/runtime/asm_amd64.s
// come in on the m->g0 stack already. Or we might already // be on the m->gsignal stack. get_tls(CX) MOVQ g(CX), DI CMPQ DI, $0 JEQ nosave MOVQ g_m(DI), R8 MOVQ m_gsignal(R8), SI CMPQ DI, SI JEQ nosave MOVQ m_g0(R8), SI CMPQ DI, SI JEQ nosave // Switch to system stack. // The original frame pointer is stored in BP, // which is useful for stack unwinding.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sat May 11 20:38:24 UTC 2024 - 60.4K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM64Ops.go
// so that regmask stays within int64 // Be careful when hand coding regmasks. var regNamesARM64 = []string{ "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", "R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15", "R16", "R17", "R18", // platform register, not used "R19", "R20", "R21", "R22", "R23", "R24", "R25", "R26",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 58.8K bytes - Viewed (0) -
src/crypto/internal/nistec/p256_asm_ppc64le.s
// Index registers needed for BR movs MOVD $8, R9 MOVD $16, R10 MOVD $24, R14 MOVDBR (R0)(R4), R5 MOVDBR (R9)(R4), R6 MOVDBR (R10)(R4), R7 MOVDBR (R14)(R4), R8 MOVD R8, 0(R3) MOVD R7, 8(R3) MOVD R6, 16(R3) MOVD R5, 24(R3) RET #define P3ptr R3 #define P1ptr R4 #define COUNT R5 #define X1L V0 #define X1H V1
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 56.5K bytes - Viewed (0)