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Results 1 - 10 of 23 for r31 (0.02 sec)
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src/runtime/mkpreempt.go
reg := fmt.Sprintf("R%d", i) l.add("MOVD", reg, 8) } l.addSpecial( "MOVW CR, R31\nMOVW R31, %d(R1)", "MOVW %d(R1), R31\nMOVFL R31, $0xff", // this is MOVW R31, CR 8) // CR is 4-byte wide, but just keep the alignment l.addSpecial( "MOVD XER, R31\nMOVD R31, %d(R1)", "MOVD %d(R1), R31\nMOVD R31, XER", 8) // Add floating point registers F0-F31. for i := 0; i <= 31; i++ {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 20 17:19:36 UTC 2023 - 15.3K bytes - Viewed (0) -
src/runtime/asm_ppc64x.s
// save scratch register R31 first MOVD R31, -184(R1) MOVD 0(R1), R31 // save caller LR MOVD R31, -304(R1) MOVD -32(R1), R31 // save argument frame size MOVD R31, -192(R1) MOVD LR, R31 MOVD R31, -320(R1) ADD $-320, R1 // save all registers that can contain pointers // and the CR register MOVW CR, R31 MOVD R31, 8(R1) MOVD R2, 24(R1) MOVD R3, 56(R1)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 18:17:17 UTC 2024 - 45.4K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/PPC64Ops.go
faultOnNilArg0: true, unsafePoint: true, }, // R31 is temp register // Loop code: // MOVD len/32,R31 set up loop ctr // MOVD R31,CTR // MOVD $16,R31 index register // loop: // LXVD2X (R0)(R4),VS32 // LXVD2X (R31)(R4),VS33 // ADD R4,$32 increment src // STXVD2X VS32,(R0)(R3) // STXVD2X VS33,(R31)(R3) // ADD R3,$32 increment dst
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 19:59:38 UTC 2024 - 43.8K bytes - Viewed (0) -
src/cmd/asm/internal/asm/operand_test.go
{"R20", "R20"}, {"R21", "R21"}, {"R22", "R22"}, {"R23", "R23"}, {"R24", "R24"}, {"R25", "R25"}, {"R26", "R26"}, {"R27", "R27"}, {"R28", "R28"}, {"R29", "R29"}, {"R3", "R3"}, {"R31", "R31"}, {"R4", "R4"}, {"R5", "R5"}, {"R6", "R6"}, {"R7", "R7"}, {"R8", "R8"}, {"R9", "R9"}, {"SPR(269)", "SPR(269)"}, {"a(FP)", "a(FP)"}, {"g", "g"}, {"ret+8(FP)", "ret+8(FP)"},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Aug 29 18:31:05 UTC 2023 - 23.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/MIPS64Ops.go
// It saves all GP registers if necessary, // but clobbers R31 (LR) because it's a call // and R23 (REGTMP). // Returns a pointer to a write barrier buffer in R25. {name: "LoweredWB", argLength: 1, reg: regInfo{clobbers: (callerSave &^ gpg) | buildReg("R31"), outputs: []regMask{buildReg("R25")}}, clobberFlags: true, aux: "Int64"},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 24 03:36:31 UTC 2023 - 25.5K bytes - Viewed (0) -
src/runtime/asm_mips64x.s
MOVV 0(R4), R0 // make sure g != nil JMP gogo<>(SB) TEXT gogo<>(SB), NOSPLIT|NOFRAME, $0 MOVV R4, g JAL runtimeĀ·save_g(SB) MOVV 0(g), R2 MOVV gobuf_sp(R3), R29 MOVV gobuf_lr(R3), R31 MOVV gobuf_ret(R3), R1 MOVV gobuf_ctxt(R3), REGCTXT MOVV R0, gobuf_sp(R3) MOVV R0, gobuf_ret(R3) MOVV R0, gobuf_lr(R3) MOVV R0, gobuf_ctxt(R3) MOVV gobuf_pc(R3), R4 JMP (R4)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 06 19:45:59 UTC 2023 - 24.3K bytes - Viewed (0) -
src/runtime/asm_mipsx.s
// are callee-save in the gcc calling convention, so save them. MOVW R23, R8 MOVW g, R9 MOVW R31, R10 // this call frame does not save LR JAL runtimeĀ·load_g(SB) MOVW g_m(g), R1 MOVW m_curg(R1), R1 MOVW (g_stack+stack_hi)(R1), R2 // return value in R2 MOVW R8, R23 MOVW R9, g MOVW R10, R31 RET // The top-most function running on a goroutine // returns to goexit+PCQuantum.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 06 11:46:29 UTC 2024 - 26.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/MIPSOps.go
// It saves all GP registers if necessary, // but clobbers R31 (LR) because it's a call // and R23 (REGTMP). // Returns a pointer to a write barrier buffer in R25. {name: "LoweredWB", argLength: 1, reg: regInfo{clobbers: (callerSave &^ gpg) | buildReg("R31"), outputs: []regMask{buildReg("R25")}}, clobberFlags: true, aux: "Int64"},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 24 14:43:03 UTC 2023 - 24K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/doc.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 21 16:47:45 UTC 2023 - 11.3K bytes - Viewed (0) -
src/runtime/sys_linux_mips64x.s
// so this function is reentrant. MOVV m_vdsoPC(R17), R2 MOVV m_vdsoSP(R17), R3 MOVV R2, 8(R29) MOVV R3, 16(R29) MOVV $ret-8(FP), R2 // caller's SP MOVV R31, m_vdsoPC(R17) MOVV R2, m_vdsoSP(R17) MOVV m_curg(R17), R4 MOVV g, R5 BNE R4, R5, noswitch MOVV m_g0(R17), R4 MOVV (g_sched+gobuf_sp)(R4), R1 // Set SP to g0 stack noswitch:
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Oct 18 20:57:24 UTC 2022 - 12K bytes - Viewed (0)