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Results 61 - 70 of 72 for f10 (0.02 sec)

  1. src/cmd/compile/internal/ssa/_gen/ARM64Ops.go

    	"g",   // aka R28
    	"R29", // frame pointer, not used
    	"R30", // aka REGLINK
    	"SP",  // aka R31
    
    	"F0",
    	"F1",
    	"F2",
    	"F3",
    	"F4",
    	"F5",
    	"F6",
    	"F7",
    	"F8",
    	"F9",
    	"F10",
    	"F11",
    	"F12",
    	"F13",
    	"F14",
    	"F15",
    	"F16",
    	"F17",
    	"F18",
    	"F19",
    	"F20",
    	"F21",
    	"F22",
    	"F23",
    	"F24",
    	"F25",
    	"F26",
    	"F27",
    	"F28",
    	"F29",
    	"F30",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 58.8K bytes
    - Viewed (0)
  2. src/cmd/compile/internal/ssa/_gen/ARMOps.go

    	"R9",
    	"g",   // aka R10
    	"R11", // tmp
    	"R12",
    	"SP",  // aka R13
    	"R14", // link
    	"R15", // pc
    
    	"F0",
    	"F1",
    	"F2",
    	"F3",
    	"F4",
    	"F5",
    	"F6",
    	"F7",
    	"F8",
    	"F9",
    	"F10",
    	"F11",
    	"F12",
    	"F13",
    	"F14",
    	"F15", // tmp
    
    	// If you add registers, update asyncPreempt in runtime.
    
    	// pseudo-registers
    	"SB",
    }
    
    func init() {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Feb 24 00:21:13 UTC 2023
    - 41K bytes
    - Viewed (0)
  3. src/cmd/vendor/golang.org/x/tools/go/analysis/passes/asmdecl/asmdecl.go

    	asmArchPpc64LE  = asmArch{name: "ppc64le", bigEndian: false, stack: "R1", lr: true, retRegs: []string{"R3", "F1"}}
    	asmArchRISCV64  = asmArch{name: "riscv64", bigEndian: false, stack: "SP", lr: true, retRegs: []string{"X10", "F10"}}
    	asmArchS390X    = asmArch{name: "s390x", bigEndian: true, stack: "R15", lr: true}
    	asmArchWasm     = asmArch{name: "wasm", bigEndian: false, stack: "SP", lr: false}
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri May 03 02:38:00 UTC 2024
    - 22.8K bytes
    - Viewed (0)
  4. src/runtime/asm_arm.s

    	MOVW	R11, 36(R13)
    
    	// Skip floating point registers on goarmsoftfp != 0.
    	MOVB    runtime·goarmsoftfp(SB), R11
    	CMP	$0, R11
    	BNE     skipfpsave
    	MOVD	F8, (40+8*0)(R13)
    	MOVD	F9, (40+8*1)(R13)
    	MOVD	F10, (40+8*2)(R13)
    	MOVD	F11, (40+8*3)(R13)
    	MOVD	F12, (40+8*4)(R13)
    	MOVD	F13, (40+8*5)(R13)
    	MOVD	F14, (40+8*6)(R13)
    	MOVD	F15, (40+8*7)(R13)
    skipfpsave:
    	// Save argc/argv.
    	MOVW	R0, _rt0_arm_lib_argc<>(SB)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Feb 23 21:00:52 UTC 2024
    - 32.1K bytes
    - Viewed (0)
  5. src/reflect/abi_test.go

    type StructFewRegs struct {
    	a0, a1, a2, a3 int
    	f0, f1, f2, f3 float64
    }
    
    type StructFillRegs struct {
    	a0, a1, a2, a3, a4, a5, a6, a7, a8                              int
    	f0, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11, f12, f13, f14 float64
    }
    
    func (m *StructWithMethods) AllRegsCall(s StructFewRegs, _ MagicLastTypeNameForTestingRegisterABI) StructFewRegs {
    	m.Value = 1
    	return s
    }
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Apr 05 17:54:15 UTC 2022
    - 26.4K bytes
    - Viewed (0)
  6. src/cmd/compile/internal/ssa/_gen/S390XOps.go

    	"R6",
    	"R7",
    	"R8",
    	"R9",
    	"R10",
    	"R11",
    	"R12",
    	"g", // R13
    	"R14",
    	"SP", // R15
    	"F0",
    	"F1",
    	"F2",
    	"F3",
    	"F4",
    	"F5",
    	"F6",
    	"F7",
    	"F8",
    	"F9",
    	"F10",
    	"F11",
    	"F12",
    	"F13",
    	"F14",
    	"F15",
    
    	// If you add registers, update asyncPreempt in runtime.
    
    	//pseudo-registers
    	"SB",
    }
    
    func init() {
    	// Make map from reg names to reg integers.
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Feb 24 00:21:13 UTC 2023
    - 52.5K bytes
    - Viewed (0)
  7. src/runtime/asm_arm64.s

    	STP	(R12, R13), (12*8)(R20)
    	STP	(R14, R15), (14*8)(R20)
    	FSTPD	(F0, F1), (16*8)(R20)
    	FSTPD	(F2, F3), (18*8)(R20)
    	FSTPD	(F4, F5), (20*8)(R20)
    	FSTPD	(F6, F7), (22*8)(R20)
    	FSTPD	(F8, F9), (24*8)(R20)
    	FSTPD	(F10, F11), (26*8)(R20)
    	FSTPD	(F12, F13), (28*8)(R20)
    	FSTPD	(F14, F15), (30*8)(R20)
    	RET
    
    // unspillArgs loads args into registers from a *internal/abi.RegArgs in R20.
    TEXT ·unspillArgs(SB),NOSPLIT,$0-0
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat May 11 20:38:24 UTC 2024
    - 43.4K bytes
    - Viewed (0)
  8. tests/migrate_test.go

    	type UserMigrateColumn2 struct {
    		ID  uint
    		F1  string
    		F2  string
    		F3  string
    		F4  string
    		F5  string
    		F6  string
    		F7  string
    		F8  string
    		F9  string
    		F10 string
    		F11 string
    		F12 string
    		F13 string
    		F14 string
    		F15 string
    		F16 string
    		F17 string
    		F18 string
    		F19 string
    		F20 string
    		F21 string
    		F22 string
    		F23 string
    Registered: Wed Jun 12 16:27:09 UTC 2024
    - Last Modified: Mon Mar 18 11:24:16 UTC 2024
    - 56.2K bytes
    - Viewed (0)
  9. test/prove.go

    		return 172
    	}
    	return 174
    }
    
    func f9(a, b bool) int {
    	if a {
    		return 1
    	}
    	if a || b { // ERROR "Disproved Arg$"
    		return 2
    	}
    	return 3
    }
    
    func f10(a string) int {
    	n := len(a)
    	// We optimize comparisons with small constant strings (see cmd/compile/internal/gc/walk.go),
    	// so this string literal must be long.
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Jan 23 00:02:36 UTC 2024
    - 21.2K bytes
    - Viewed (0)
  10. src/runtime/asm_ppc64x.s

    	FMOVD	F1, 96(R20)
    	FMOVD	F2, 104(R20)
    	FMOVD   F3, 112(R20)
    	FMOVD   F4, 120(R20)
    	FMOVD   F5, 128(R20)
    	FMOVD   F6, 136(R20)
    	FMOVD   F7, 144(R20)
    	FMOVD   F8, 152(R20)
    	FMOVD   F9, 160(R20)
    	FMOVD   F10, 168(R20)
    	FMOVD   F11, 176(R20)
    	FMOVD   F12, 184(R20)
    	RET
    
    // unspillArgs loads args into registers from a *internal/abi.RegArgs in R20.
    TEXT runtime·unspillArgs(SB),NOSPLIT,$0-0
    	MOVD    0(R20), R3
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 18:17:17 UTC 2024
    - 45.4K bytes
    - Viewed (0)
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