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Results 31 - 40 of 51 for r28 (0.02 sec)
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src/runtime/signal_freebsd_arm64.go
func (c *sigctxt) r25() uint64 { return c.regs().mc_gpregs.gp_x[25] } func (c *sigctxt) r26() uint64 { return c.regs().mc_gpregs.gp_x[26] } func (c *sigctxt) r27() uint64 { return c.regs().mc_gpregs.gp_x[27] } func (c *sigctxt) r28() uint64 { return c.regs().mc_gpregs.gp_x[28] } func (c *sigctxt) r29() uint64 { return c.regs().mc_gpregs.gp_x[29] } func (c *sigctxt) lr() uint64 { return c.regs().mc_gpregs.gp_lr }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Sep 20 18:20:42 UTC 2023 - 3.2K bytes - Viewed (0) -
src/runtime/signal_openbsd_arm64.go
func (c *sigctxt) r25() uint64 { return (uint64)(c.regs().sc_x[25]) } func (c *sigctxt) r26() uint64 { return (uint64)(c.regs().sc_x[26]) } func (c *sigctxt) r27() uint64 { return (uint64)(c.regs().sc_x[27]) } func (c *sigctxt) r28() uint64 { return (uint64)(c.regs().sc_x[28]) } func (c *sigctxt) r29() uint64 { return (uint64)(c.regs().sc_x[29]) } func (c *sigctxt) lr() uint64 { return (uint64)(c.regs().sc_lr) }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Sep 20 18:20:42 UTC 2023 - 3.4K bytes - Viewed (0) -
src/runtime/signal_openbsd_mips64.go
func (c *sigctxt) r25() uint64 { return c.regs().sc_regs[25] } func (c *sigctxt) r26() uint64 { return c.regs().sc_regs[26] } func (c *sigctxt) r27() uint64 { return c.regs().sc_regs[27] } func (c *sigctxt) r28() uint64 { return c.regs().sc_regs[28] } func (c *sigctxt) r29() uint64 { return c.regs().sc_regs[29] } func (c *sigctxt) r30() uint64 { return c.regs().sc_regs[30] } func (c *sigctxt) r31() uint64 { return c.regs().sc_regs[31] }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 29 08:07:46 UTC 2020 - 3.3K bytes - Viewed (0) -
src/hash/crc32/crc32_ppc64le.s
MOVWZ (R10)(R25),R27 // tab[6][crc>>8&0xFF] ADD $1024,R10,R10 // &tab[7] SLD $2,R26,R26 // crc&0xFF*2 XOR R21,R27,R21 // xor done R27 ADD $8,R5 // p = p[8:] MOVWZ (R10)(R26),R28 // tab[7][crc&0xFF] XOR R21,R28,R21 // xor done R28 MOVWZ R21,R7 // crc for next round BDNZ loop ANDCC $7,R6,R8 // any leftover bytes BEQ done // none --> done MOVD R8,CTR // byte count PCALIGN $16 // align short loop
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 06 12:09:50 UTC 2024 - 13.1K bytes - Viewed (0) -
src/runtime/signal_linux_mipsx.go
func (c *sigctxt) r26() uint32 { return uint32(c.regs().sc_regs[26]) } func (c *sigctxt) r27() uint32 { return uint32(c.regs().sc_regs[27]) } func (c *sigctxt) r28() uint32 { return uint32(c.regs().sc_regs[28]) } func (c *sigctxt) r29() uint32 { return uint32(c.regs().sc_regs[29]) } func (c *sigctxt) r30() uint32 { return uint32(c.regs().sc_regs[30]) }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 28 18:17:57 UTC 2021 - 3.7K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/inst.go
R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 R24 R25 R26 R27 R28 R29 R30 R31 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 03 01:35:44 UTC 2021 - 4.5K bytes - Viewed (0) -
src/crypto/md5/md5block_ppc64x.s
MOVD $off,idx; \ MOVWBR (idx)(ptr), dst #endif #define M00 R18 #define M01 R19 #define M02 R20 #define M03 R24 #define M04 R25 #define M05 R26 #define M06 R27 #define M07 R28 #define M08 R29 #define M09 R21 #define M10 R11 #define M11 R8 #define M12 R7 #define M13 R12 #define M14 R23 #define M15 R10 #define ROUND1(a, b, c, d, index, const, shift) \ ADD $const, index, R9; \
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 20 18:05:32 UTC 2024 - 5.3K bytes - Viewed (0) -
src/runtime/race_arm64.s
// A brief recap of the arm64 calling convention. // Arguments are passed in R0...R7, the rest is on stack. // Callee-saved registers are: R19...R28. // Temporary registers are: R9...R15 // SP must be 16-byte aligned. // When calling racecalladdr, R9 is the call target address. // The race ctx, ThreadState *thr below, is passed in R0 and loaded in racecalladdr.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 17 18:37:29 UTC 2024 - 15.5K bytes - Viewed (0) -
src/runtime/asm_ppc64x.s
MOVD R19, 200(R1) MOVD R20, 208(R1) MOVD R21, 216(R1) MOVD R22, 224(R1) MOVD R23, 232(R1) MOVD R24, 240(R1) MOVD R25, 248(R1) MOVD R26, 256(R1) MOVD R27, 264(R1) MOVD R28, 272(R1) MOVD R29, 280(R1) MOVD g, 288(R1) MOVD LR, R31 MOVD R31, 32(R1) CALL runtimeĀ·debugCallCheck(SB) MOVD 40(R1), R22 XOR R0, R0 CMP R22, $0 BEQ good MOVD 48(R1), R22
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 18:17:17 UTC 2024 - 45.4K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/MIPSOps.go
"R11", "R12", "R13", "R14", "R15", "R16", "R17", "R18", "R19", "R20", "R21", "R22", //REGTMP "R24", "R25", // R26 reserved by kernel // R27 reserved by kernel "R28", "SP", // aka R29 "g", // aka R30 "R31", // REGLINK // odd FP registers contain high parts of 64-bit FP values "F0", "F2", "F4", "F6", "F8", "F10", "F12", "F14", "F16",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 24 14:43:03 UTC 2023 - 24K bytes - Viewed (0)