for i := 0; i < 12; i++ {
		if i > 7 {
			dst.gp_regs[i+6] = uint64(src.Ints[i])
		} else {
			dst.gp_regs[i+3] = uint64(src.Ints[i])
		}
	}
	// Fprs F1..F13 are used to pass float arguments in registers on PPC64
	for i := 0; i < 12; i++ {
		dst.fp_regs[i+1] = math.Float64frombits(src.Floats[i])
	}

}

func loadRegArgs(dst *abi.RegArgs, src *sigcontext) {

	FADDD F24, F14, F12                        // cc29781e
	//TODO VFADDP V4.D2, F13                   // 8dd8707e
	//TODO VFADDP V30.S4, V3.S4, V11.S4        // 6bd43e6e
	FCCMPS LE, F17, F12, $14                   // 8ed5311e
	FCCMPD HI, F11, F15, $15                   // ef856b1e
	FCCMPES HS, F28, F13, $13                  // bd253c1e
	FCCMPED LT, F20, F4, $9                    // 99b4741e

	MOVF F3, 128(R29)
	MOVF F4, 132(R29)
	MOVF F5, 136(R29)
	MOVF F6, 140(R29)
	MOVF F7, 144(R29)
	MOVF F8, 148(R29)
	MOVF F9, 152(R29)
	MOVF F10, 156(R29)
	MOVF F11, 160(R29)
	MOVF F12, 164(R29)
	MOVF F13, 168(R29)
	MOVF F14, 172(R29)
	MOVF F15, 176(R29)
	MOVF F16, 180(R29)
	MOVF F17, 184(R29)
	MOVF F18, 188(R29)
	MOVF F19, 192(R29)
	MOVF F20, 196(R29)
	MOVF F21, 200(R29)
	MOVF F22, 204(R29)

	FMOVD F3, 280(R1)
	FMOVD F4, 288(R1)
	FMOVD F5, 296(R1)
	FMOVD F6, 304(R1)
	FMOVD F7, 312(R1)
	FMOVD F8, 320(R1)
	FMOVD F9, 328(R1)
	FMOVD F10, 336(R1)
	FMOVD F11, 344(R1)
	FMOVD F12, 352(R1)
	FMOVD F13, 360(R1)
	FMOVD F14, 368(R1)
	FMOVD F15, 376(R1)
	FMOVD F16, 384(R1)
	FMOVD F17, 392(R1)
	FMOVD F18, 400(R1)
	FMOVD F19, 408(R1)
	FMOVD F20, 416(R1)
	FMOVD F21, 424(R1)
	FMOVD F22, 432(R1)

func f10[S2 ~[]E2, S1 ~[]E1, E2 ~byte, E1 ~byte](S1, S2) {}
func f11[S1 ~[]E1, S2 ~[]E2, E2 ~byte, E1 ~byte](S1, S2) {}
func f12[S1 ~[]E1, E1 ~byte, E2 ~byte, S2 ~[]E2](S1, S2) {}
func f13[E1 ~byte, S1 ~[]E1, E2 ~byte, S2 ~[]E2](S1, S2) {}
func f14[E2 ~byte, S1 ~[]E1, E1 ~byte, S2 ~[]E2](S1, S2) {}
func f15[S1 ~[]E1, E2 ~byte, E1 ~byte, S2 ~[]E2](S1, S2) {}
func f16[E1 ~byte, E2 ~byte, S1 ~[]E1, S2 ~[]E2](S1, S2) {}

	E3 E
	E4 E
}

type E struct {
	F1  string
	F2  string
	F3  string
	F4  string
	F5  string
	F6  string
	F7  string
	F8  string
	F9  string
	F10 string
	F11 string
	F12 string
	F13 string
	F14 string
	F15 string
	F16 string

	"R27",
	"R28",
	"R29",
	// R30 is REGTMP not used in regalloc
	"R31",

	"F0",
	"F1",
	"F2",
	"F3",
	"F4",
	"F5",
	"F6",
	"F7",
	"F8",
	"F9",
	"F10",
	"F11",
	"F12",
	"F13",
	"F14",
	"F15",
	"F16",
	"F17",
	"F18",
	"F19",
	"F20",
	"F21",
	"F22",
	"F23",
	"F24",
	"F25",
	"F26",
	"F27",
	"F28",
	"F29",
	"F30",
	"F31",

	f1 float64 = f0
	f2 = +1
	f3 = +f0
	f4 float64 = +1
	f5 float64 = +f4
	f6 = -1
	f7 = -f0
	f8 float64 = -1
	f9 float64 = -f4
	f10 = !f0 /* ERROR "not defined" */
	f11 = ^1
	f12 = ^i0
	f13 float64 = ^1
	f14 float64 = ^f4 /* ERROR "not defined" */
	f15 = *f0 /* ERROR "cannot indirect" */
	f16 = &f0
	f17 = *u16
	f18 = <-u16 /* ERROR "cannot receive" */

	R18
	R19
	R20
	R21
	R22
	R23
	R24
	R25
	R26
	R27
	R28
	R29
	R30
	R31
	F0
	F1
	F2
	F3
	F4
	F5
	F6
	F7
	F8
	F9
	F10
	F11
	F12
	F13
	F14
	F15
	F16
	F17
	F18
	F19
	F20
	F21
	F22
	F23
	F24
	F25
	F26
	F27
	F28
	F29
	F30
	F31
	V0 // VSX extension, F0 is V0[0:63].
	V1
	V2

	"R8",
	"R9",
	"R10",
	"R11",
	"R12",
	"R13",
	"R14",
	"R15",

	"F0",
	"F1",
	"F2",
	"F3",
	"F4",
	"F5",
	"F6",
	"F7",
	"F8",
	"F9",
	"F10",
	"F11",
	"F12",
	"F13",
	"F14",
	"F15",

	"F16",
	"F17",
	"F18",
	"F19",
	"F20",
	"F21",
	"F22",
	"F23",
	"F24",
	"F25",
	"F26",
	"F27",
	"F28",
	"F29",
	"F30",
	"F31",

	"SP",