{"VADDPD.SAE.SAE X0, X1, X2", `duplicate suffix "SAE"`},
		{"VADDPD.RZ_SAE.SAE X0, X1, X2", `bad suffix combination`},

		// BSWAP on 16-bit registers is undefined. See #29167,
		{"BSWAPW DX", `unrecognized instruction`},
		{"BSWAPW R11", `unrecognized instruction`},
	})
}

func testBadInstParser(t *testing.T, goarch string, tests []badInstTest) {
	for i, test := range tests {

	VPGATHERDQ X2, 664(BX*1), X1    // ERROR "invalid instruction"
	VPGATHERDQ Y2, (BP)(AX*2), Y1   // ERROR "invalid instruction"
	VPGATHERDQ Y5, 664(DX*8), Y6    // ERROR "invalid instruction"
	VPGATHERDQ Y5, (DX), Y0         // ERROR "invalid instruction"
	// VM/X rejects Y index register.
	VPGATHERDQ Y5, 664(Y14*8), Y6   // ERROR "invalid instruction"

	for i := start; i <= number; i++ {
		if paddinglen == 0 {
			seq = append(seq, fmt.Sprintf("%x", i))
		} else {
			seq = append(seq, fmt.Sprintf(fmt.Sprintf("%%0%dx", paddinglen), i))
		}
	}
	return seq
}

func getSequences(start int, number int, paddinglen int) (seq []string) {
	for i := start; i <= number; i++ {
		if paddinglen == 0 {

        assertEquals(ConfigType.WEB, crawlingConfigHelper.getConfigType("WX"));
        assertEquals(ConfigType.FILE, crawlingConfigHelper.getConfigType("FX"));
        assertEquals(ConfigType.DATA, crawlingConfigHelper.getConfigType("DX"));
    }

    @Test
    public void test_getCrawlingConfig() {
        crawlingConfigHelper.refresh();
        assertNull(crawlingConfigHelper.getCrawlingConfig(null));

name","attributetype","azimuth","basefrequency","baseline-shift","begin","bias","by","class","clip","clippathunits","clip-path","clip-rule","color","color-interpolation","color-interpolation-filters","color-profile","color-rendering","cx","cy","d","dx","dy","diffuseconstant","direction","display","divisor","dur","edgemode","elevation","end","exponent","fill","fill-opacity","fill-rule","filter","filterunits","flood-color","flood-opacity","font-family","font-size","font-size-adjust","font-stretch"...

			if tok == scanner.EOF {
				p.errorf("unexpected EOF")
				return "", "", nil, false
			}
			// Split operands on comma. Also, the old syntax on x86 for a "register pair"
			// was AX:DX, for which the new syntax is DX, AX. Note the reordering.
			if tok == '\n' || tok == ';' || (nesting == 0 && (tok == ',' || tok == ':')) {
				if tok == ':' {
					// Remember this location so we can swap the operands below.
					if colon >= 0 {

	VPMADD52HUQ 15(DX)(BX*2), Y31, K7, Y17             // 62e28527b58c5a0f000000
	VPMADD52HUQ Y28, Y8, K7, Y17                       // 6282bd2fb5cc
	VPMADD52HUQ Y13, Y8, K7, Y17                       // 62c2bd2fb5cd
	VPMADD52HUQ Y7, Y8, K7, Y17                        // 62e2bd2fb5cf
	VPMADD52HUQ (R8), Y8, K7, Y17                      // 62c2bd2fb508
	VPMADD52HUQ 15(DX)(BX*2), Y8, K7, Y17              // 62e2bd2fb58c5a0f000000

	VMOVDQU8 X11, K5, -7(CX)(DX*1)                     // 62717f0d7f9c11f9ffffff
	VMOVDQU8 X11, K5, -15(R14)(R15*4)                  // 62117f0d7f9cbef1ffffff
	VMOVDQU8 X24, K3, X31                              // 62017f0b7fc7
	VMOVDQU8 15(DX)(BX*1), K3, X31                     // 62617f0b6fbc1a0f000000
	VMOVDQU8 -7(CX)(DX*2), K3, X31                     // 62617f0b6fbc51f9ffffff

	VRCP28PS 15(DX)(BX*1), K3, Z28                     // 62627d4bcaa41a0f000000
	VRCP28PS -7(CX)(DX*2), K3, Z28                     // 62627d4bcaa451f9ffffff
	VRCP28PS Z13, K3, Z6                               // 62d27d4bcaf5
	VRCP28PS Z21, K3, Z6                               // 62b27d4bcaf5
	VRCP28PS 15(DX)(BX*1), K3, Z6                      // 62f27d4bcab41a0f000000

	VPCOMPRESSB X13, K1, X28                           // 62127d0963ec
	VPCOMPRESSB X8, K1, X28                            // 62127d0963c4
	VPCOMPRESSB X7, K1, -7(CX)(DX*1)                   // 62f27d09637c11f9
	VPCOMPRESSB X13, K1, -7(CX)(DX*1)                  // 62727d09636c11f9
	VPCOMPRESSB X8, K1, -7(CX)(DX*1)                   // 62727d09634411f9
	VPCOMPRESSB X7, K1, -15(R14)(R15*4)                // 62927d09637cbef1