- Sort Score
- Result 10 results
- Languages All
Results 31 - 40 of 43 for f10 (1.77 sec)
-
src/cmd/compile/internal/test/abiutils_test.go
IN 14: R{ F6 } spilloffset: 64 typ: float64 IN 15: R{ F7 } spilloffset: 72 typ: float64 IN 16: R{ F8 F9 } spilloffset: 80 typ: complex128 IN 17: R{ F10 F11 } spilloffset: 96 typ: complex128 IN 18: R{ F12 F13 } spilloffset: 112 typ: complex128 IN 19: R{ } offset: 0 typ: complex128 IN 20: R{ } offset: 16 typ: complex64
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Oct 04 15:11:40 UTC 2023 - 14.2K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/s390x.s
FADDS F0, F15 // b30a00f0 FADD F1, F14 // b31a00e1 FSUBS F2, F13 // b30b00d2 FSUB F3, F12 // b31b00c3 FMULS F4, F11 // b31700b4 FMUL F5, F10 // b31c00a5 FDIVS F6, F9 // b30d0096 FDIV F7, F8 // b31d0087 FABS F1, F2 // b3100021 FSQRTS F3, F4 // b3140043
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Nov 22 03:55:32 UTC 2023 - 21.6K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM64Ops.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 58.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARMOps.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Feb 24 00:21:13 UTC 2023 - 41K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/tools/go/analysis/passes/asmdecl/asmdecl.go
asmArchPpc64LE = asmArch{name: "ppc64le", bigEndian: false, stack: "R1", lr: true, retRegs: []string{"R3", "F1"}} asmArchRISCV64 = asmArch{name: "riscv64", bigEndian: false, stack: "SP", lr: true, retRegs: []string{"X10", "F10"}} asmArchS390X = asmArch{name: "s390x", bigEndian: true, stack: "R15", lr: true} asmArchWasm = asmArch{name: "wasm", bigEndian: false, stack: "SP", lr: false}
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 03 02:38:00 UTC 2024 - 22.8K bytes - Viewed (0) -
src/runtime/asm_arm.s
MOVW R11, 36(R13) // Skip floating point registers on goarmsoftfp != 0. MOVB runtime·goarmsoftfp(SB), R11 CMP $0, R11 BNE skipfpsave MOVD F8, (40+8*0)(R13) MOVD F9, (40+8*1)(R13) MOVD F10, (40+8*2)(R13) MOVD F11, (40+8*3)(R13) MOVD F12, (40+8*4)(R13) MOVD F13, (40+8*5)(R13) MOVD F14, (40+8*6)(R13) MOVD F15, (40+8*7)(R13) skipfpsave: // Save argc/argv. MOVW R0, _rt0_arm_lib_argc<>(SB)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Feb 23 21:00:52 UTC 2024 - 32.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/S390XOps.go
"R6", "R7", "R8", "R9", "R10", "R11", "R12", "g", // R13 "R14", "SP", // R15 "F0", "F1", "F2", "F3", "F4", "F5", "F6", "F7", "F8", "F9", "F10", "F11", "F12", "F13", "F14", "F15", // If you add registers, update asyncPreempt in runtime. //pseudo-registers "SB", } func init() { // Make map from reg names to reg integers.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Feb 24 00:21:13 UTC 2023 - 52.5K bytes - Viewed (0) -
src/runtime/asm_arm64.s
STP (R12, R13), (12*8)(R20) STP (R14, R15), (14*8)(R20) FSTPD (F0, F1), (16*8)(R20) FSTPD (F2, F3), (18*8)(R20) FSTPD (F4, F5), (20*8)(R20) FSTPD (F6, F7), (22*8)(R20) FSTPD (F8, F9), (24*8)(R20) FSTPD (F10, F11), (26*8)(R20) FSTPD (F12, F13), (28*8)(R20) FSTPD (F14, F15), (30*8)(R20) RET // unspillArgs loads args into registers from a *internal/abi.RegArgs in R20. TEXT ·unspillArgs(SB),NOSPLIT,$0-0
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sat May 11 20:38:24 UTC 2024 - 43.4K bytes - Viewed (0) -
tests/migrate_test.go
type UserMigrateColumn2 struct { ID uint F1 string F2 string F3 string F4 string F5 string F6 string F7 string F8 string F9 string F10 string F11 string F12 string F13 string F14 string F15 string F16 string F17 string F18 string F19 string F20 string F21 string F22 string F23 string
Registered: Wed Jun 12 16:27:09 UTC 2024 - Last Modified: Mon Mar 18 11:24:16 UTC 2024 - 56.2K bytes - Viewed (0) -
test/prove.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Jan 23 00:02:36 UTC 2024 - 21.2K bytes - Viewed (0)