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Results 11 - 15 of 15 for ROTR (0.07 sec)

  1. src/crypto/sha512/sha512block_amd64.s

    #define MSGSCHEDULE0(index) \
    	MOVQ	(index*8)(SI), AX; \
    	BSWAPQ	AX; \
    	MOVQ	AX, (index*8)(BP)
    
    // Wt = SIGMA1(Wt-2) + Wt-7 + SIGMA0(Wt-15) + Wt-16; for 16 <= t <= 79
    //   SIGMA0(x) = ROTR(1,x) XOR ROTR(8,x) XOR SHR(7,x)
    //   SIGMA1(x) = ROTR(19,x) XOR ROTR(61,x) XOR SHR(6,x)
    #define MSGSCHEDULE1(index) \
    	MOVQ	((index-2)*8)(BP), AX; \
    	MOVQ	AX, CX; \
    	RORQ	$19, AX; \
    	MOVQ	CX, DX; \
    	RORQ	$61, CX; \
    	SHRQ	$6, DX; \
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 27K bytes
    - Viewed (0)
  2. src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go

    		{name: "ROTR", argLength: 2, reg: gp21, asm: "ROTR"},                      // arg0 right rotate by (arg1 mod 32) bits
    		{name: "ROTRV", argLength: 2, reg: gp21, asm: "ROTRV"},                    // arg0 right rotate by (arg1 mod 64) bits
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Nov 21 19:04:19 UTC 2023
    - 25.2K bytes
    - Viewed (0)
  3. src/cmd/compile/internal/ssa/_gen/LOONG64.rules

    (RotateLeft16 <t> x (MOVVconst [c])) => (Or16 (Lsh16x64 <t> x (MOVVconst [c&15])) (Rsh16Ux64 <t> x (MOVVconst [-c&15])))
    (RotateLeft32 x y) => (ROTR  x (NEGV <y.Type> y))
    (RotateLeft64 x y) => (ROTRV x (NEGV <y.Type> y))
    
    // unary ops
    (Neg(64|32|16|8) ...) => (NEGV ...)
    (Neg(32|64)F ...) => (NEG(F|D) ...)
    
    (Com(64|32|16|8) x) => (NOR (MOVVconst [0]) x)
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Nov 21 19:26:25 UTC 2023
    - 31.8K bytes
    - Viewed (0)
  4. src/cmd/compile/internal/ssa/rewriteLOONG64.go

    		v.AuxInt = int64ToAuxInt(int64(uint64(c) % uint64(d)))
    		return true
    	}
    	return false
    }
    func rewriteValueLOONG64_OpLOONG64ROTR(v *Value) bool {
    	v_1 := v.Args[1]
    	v_0 := v.Args[0]
    	// match: (ROTR x (MOVVconst [c]))
    	// result: (ROTRconst x [c&31])
    	for {
    		x := v_0
    		if v_1.Op != OpLOONG64MOVVconst {
    			break
    		}
    		c := auxIntToInt64(v_1.AuxInt)
    		v.reset(OpLOONG64ROTRconst)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Nov 21 19:26:25 UTC 2023
    - 195.8K bytes
    - Viewed (0)
  5. src/cmd/compile/internal/ssa/opGen.go

    			},
    			outputs: []outputInfo{
    				{0, 1071644664}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R23 R24 R25 R26 R27 R28 R29 R31
    			},
    		},
    	},
    	{
    		name:   "ROTR",
    		argLen: 2,
    		asm:    loong64.AROTR,
    		reg: regInfo{
    			inputs: []inputInfo{
    				{0, 1073741816}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 g R23 R24 R25 R26 R27 R28 R29 R31
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 1M bytes
    - Viewed (0)
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