TEXT	·logAsm(SB), NOSPLIT, $0-16
	FMOVD	x+0(FP), F0
	MOVD	$·logrodataL21<>+0(SB), R9
	MOVH	$0x8006, R4
	LGDR	F0, R1
	MOVD	$0x3FF0000000000000, R6
	SRAD	$48, R1, R1
	MOVD	$0x40F03E8000000000, R8
	SUBW	R1, R4
	RISBGZ	$32, $59, $0, R4, R2
	RISBGN	$0, $15, $48, R2, R6
	RISBGN	$16, $31, $32, R2, R8
	MOVW	R1, R7
	CMPBGT	R7, $22, L17
	LTDBR	F0, F0

	// arm64:"TST\t[$]63",-"UDIV",-"ASR",-"AND"
	// ppc64x:"ANDCC",-"RLDICL",-"SRAD",-"CMP"
	a := n1%64 == 0 // signed divisible

	// 386:"TESTL\t[$]63",-"DIVL",-"SHRL"
	// amd64:"TESTQ\t[$]63",-"DIVQ",-"SHRQ"
	// arm:"AND\t[$]63",-".*udiv",-"SRA"
	// arm64:"TST\t[$]63",-"UDIV",-"ASR",-"AND"
	// ppc64x:"ANDCC",-"RLDICL",-"SRAD",-"CMP"
	b := n2%64 != 0 // signed indivisible

	return a, b
}

		return true
	case OR, ORCC, ORC, ORCCC, AND, ANDCC, ANDC, ANDCCC, XOR, XORCC, NAND, NANDCC, EQV, EQVCC, NOR, NORCC:
		return true
	case SLW, SLWCC, SLD, SLDCC, SRW, SRAW, SRWCC, SRAWCC, SRD, SRDCC, SRAD, SRADCC:
		return true
	}
	return false
}

// revCondMap maps a conditional register bit to its inverse, if possible.
var revCondMap = map[string]string{
	"LT": "GE", "GT": "LE", "EQ": "NE",
}

	VPSRAD $0, -7(DI)(R8*1), K4, Z15                   // 62b1054c72a407f9ffffff00
	VPSRAD $0, (SP), K4, Z15                           // 62f1054c72242400
	VPSRAD X12, X16, K2, X20                           // 62c17d02e2e4
	VPSRAD 99(R15)(R15*1), X16, K2, X20                // 62817d02e2a43f63000000
	VPSRAD (DX), X16, K2, X20                          // 62e17d02e222
	VPSRAD X6, Y21, K2, Y2                             // 62f15522e2d6

(Rsh8Ux(64|32|16|8)  x y) && shiftIsBounded(v) => (SRD (MOVBZreg x) y)
(Rsh64x(64|32|16|8)  x y) && shiftIsBounded(v) => (SRAD x y)
(Rsh32x(64|32|16|8)  x y) && shiftIsBounded(v) => (SRAW x y)
(Rsh16x(64|32|16|8)  x y) && shiftIsBounded(v) => (SRAD (MOVHreg x) y)
(Rsh8x(64|32|16|8)   x y) && shiftIsBounded(v) => (SRAD (MOVBreg x) y)

// Unbounded shifts. Go shifts saturate to 0 or -1 when shifting beyond the number of

// with coefficients determined with a Remez exchange algorithm.

TEXT	·acosAsm(SB), NOSPLIT, $0-16
	FMOVD	x+0(FP), F0
	MOVD	$·acosrodataL13<>+0(SB), R9
	LGDR	F0, R12
	FMOVD	F0, F10
	SRAD	$32, R12
	WORD	$0xC0293FE6	//iilf	%r2,1072079005
	BYTE	$0xA0
	BYTE	$0x9D
	WORD	$0xB917001C	//llgtr	%r1,%r12
	CMPW	R1,R2
	BGT	L2
	FMOVD	192(R9), F8
	FMADD	F0, F0, F8
	FMOVD	184(R9), F1
L3:

// with coefficients determined with a Remez exchange algorithm.

TEXT	·asinAsm(SB), NOSPLIT, $0-16
	FMOVD	x+0(FP), F0
	MOVD	$·asinrodataL15<>+0(SB), R9
	LGDR	F0, R7
	FMOVD	F0, F8
	SRAD	$32, R7
	WORD	$0xC0193FE6 //iilf  %r1,1072079005
	BYTE	$0xA0
	BYTE	$0x9D
	WORD	$0xB91700C7 //llgtr %r12,%r7
	MOVW	R12, R8
	MOVW	R1, R6
	CMPBGT	R8, R6, L2
	WORD	$0xC0193BFF //iilf  %r1,1006632959
	BYTE	$0xFF

	return uint64(v) >> 16
}

func rshConst64Ux64Overflow8(v uint8) uint64 {
	// riscv64:"MOV\t\\$0,",-"SRL"
	return uint64(v) >> 8
}

func rshConst64x64(v int64) int64 {
	// ppc64x:"SRAD"
	// riscv64:"SRAI\t",-"OR",-"SLTIU"
	return v >> uint64(33)
}

func rshConst64x64Overflow32(v int32) int64 {
	// riscv64:"SRAIW",-"SLLI",-"SRAI\t"
	return int64(v) >> 32
}

	MOVD	$·log1pc6<>+0(SB), R1
	WFSDB	V0, V3, V4
	VLEG	$0, 0(R1), V18
	MOVD	$·log1pc5<>+0(SB), R1
	VLEG	$0, 0(R1), V16
	MOVD	R2, R5
	LGDR	F4, R3
	WORD	$0xC0190006	//iilf	%r1,425983
	BYTE	$0x7F
	BYTE	$0xFF
	SRAD	$32, R3, R3
	SUBW	R3, R1
	SRW	$16, R1, R1
	BYTE	$0x18	//lr	%r4,%r1
	BYTE	$0x41
	RISBGN	$0, $15, $48, R4, R2
	RISBGN	$16, $31, $32, R4, R5
	MOVW	R0, R6
	MOVW	R3, R7
	CMPBGT	R6, R7, L8

	SLW	$4, R3, R6              // eb63000400df
	SLW	R2, R3, R6              // eb63200000df
	SLD	$4, R3, R6              // eb630004000d
	SLD	R2, R3, R6              // eb632000000d
	SRAD	$4, R5, R8              // eb850004000a
	SRAD	R3, R5, R8              // eb853000000a
	SRAW	$4, R5, R8              // eb85000400dc
	SRAW	R3, R5, R8              // eb85300000dc
	RLL	R1, R2, R3              // eb321000001d