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src/cmd/asm/internal/asm/testdata/amd64enc.s
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Fri Oct 08 21:38:44 UTC 2021 - 581.9K bytes - Viewed (1) -
src/cmd/asm/internal/asm/testdata/arm64error.s
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Wed Mar 26 10:48:50 UTC 2025 - 37.9K bytes - Viewed (0) -
doc/asm.html
The range of registers is specified by a start register and an end register. For example, <code>LMG</code> <code>(R9),</code> <code>R5,</code> <code>R7</code> would load <code>R5</code>, <code>R6</code> and <code>R7</code> with the 64-bit values at <code>0(R9)</code>, <code>8(R9)</code> and <code>16(R9)</code> respectively. </p> <p> Storage-and-storage instructions such as <code>MVC</code> and <code>XC</code> are written
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Tue Nov 28 19:15:27 UTC 2023 - 36.3K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/avx512enc/avx512f.s
VCVTSD2USIQ X28, CX // 6291ff0879cc VCVTSD2USIQ X20, R9 // 6231ff0879cc or 6231ff2879cc or 6231ff4879cc VCVTSD2USIQ (CX), R9 // 6271ff087909 or 6271ff287909 or 6271ff487909 VCVTSD2USIQ 99(R15), R9 // 6251ff08798f63000000 or 6251ff28798f63000000 or 6251ff48798f63000000
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Tue May 22 14:57:15 UTC 2018 - 410.5K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/avx512enc/avx512dq.s
KMOVB K4, AX // c5f993c4 KMOVB K6, AX // c5f993c6 KMOVB K4, R9 // c57993cc KMOVB K6, R9 // c57993ce KMOVB K5, K0 // c5f990c5 KMOVB K4, K0 // c5f990c4
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Tue May 22 14:57:15 UTC 2018 - 194.8K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/avx512enc/avx512bw.s
KMOVD 7(AX), K4 // c4e1f9906007 KMOVD (DI), K4 // c4e1f99027 KMOVD R9, K4 // c4c17b92e1 KMOVD CX, K4 // c5fb92e1 KMOVD R9, K5 // c4c17b92e9 KMOVD CX, K5 // c5fb92e9
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Tue May 22 14:57:15 UTC 2018 - 159.2K bytes - Viewed (0) -
src/cmd/asm/internal/asm/asm.go
func (p *Parser) branch(addr *obj.Addr, target *obj.Prog) { *addr = obj.Addr{ Type: obj.TYPE_BRANCH, Index: 0, } addr.Val = target } // asmInstruction assembles an instruction. // MOVW R9, (R10) func (p *Parser) asmInstruction(op obj.As, cond string, a []obj.Addr) { // fmt.Printf("%s %+v\n", op, a) prog := &obj.Prog{ Ctxt: p.ctxt, Pos: p.pos(), As: op, } switch len(a) {
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Tue Aug 05 17:31:25 UTC 2025 - 26.2K bytes - Viewed (0) -
api/go1.txt
pkg debug/macho, type RegsAMD64 struct, R14 uint64 pkg debug/macho, type RegsAMD64 struct, R15 uint64 pkg debug/macho, type RegsAMD64 struct, R8 uint64 pkg debug/macho, type RegsAMD64 struct, R9 uint64 pkg debug/macho, type RegsAMD64 struct, SI uint64 pkg debug/macho, type RegsAMD64 struct, SP uint64 pkg debug/macho, type Section struct pkg debug/macho, type Section struct, embedded SectionHeader
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Wed Aug 14 18:58:28 UTC 2013 - 1.7M bytes - Viewed (0)