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src/cmd/asm/internal/asm/testdata/s390x.s
LAXG R10, R11, (R12) // ebbac00000e7 LAO R1, R2, (R3) // eb21300000f6 LAOG R4, R5, (R6) // eb54600000e6 // load and store multiple LMG n-8(SP), R3, R4 // eb34f0100004 LMG -5(R5), R3, R4 // eb345ffbff04 LMY n-8(SP), R3, R4 // 9834f010 LMY 4096(R1), R3, R4 // eb3410000198 STMG R1, R2, n-8(SP) // eb12f0100024
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Wed Jul 30 19:29:15 UTC 2025 - 22.9K bytes - Viewed (0) -
doc/asm.html
</p> <p> Load- and store-multiple instructions operate on a range of registers. The range of registers is specified by a start register and an end register. For example, <code>LMG</code> <code>(R9),</code> <code>R5,</code> <code>R7</code> would load <code>R5</code>, <code>R6</code> and <code>R7</code> with the 64-bit values at <code>0(R9)</code>, <code>8(R9)</code> and <code>16(R9)</code> respectively. </p>
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Tue Nov 28 19:15:27 UTC 2023 - 36.3K bytes - Viewed (0) -
lib/fips140/v1.0.0.zip
back if interrupted RET crash: MOVD $0, (R0) RET // func ghashAsm(key *gcmHashKey, hash *[16]byte, data []byte) TEXT ·ghashAsm(SB),NOSPLIT,$32-40 MOVD $65, R0 // GHASH function code MOVD key+0(FP), R2 LMG (R2), R6, R7 MOVD hash+8(FP), R8 LMG (R8), R4, R5 MOVD $params-32(SP), R1 STMG R4, R7, (R1) LMG data+16(FP), R2, R3 // R2=base, R3=len loop: KIMD R0, R2 // compute intermediate message digest (KIMD) BVS loop // branch back if interrupted MVC $16, (R1), (R8) MOVD $0, R0 RET // func kmaGCM(fn int,...
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Wed Jan 29 15:10:35 UTC 2025 - 635K bytes - Viewed (0)