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Results 1 - 6 of 6 for R9 (0.17 sec)

  1. src/cmd/asm/internal/asm/testdata/s390x.s

    	RISBLGZ	$9, $24, $11, R11, R0 // ec0b09980b51
    
    	LAA	R1, R2, 524287(R3)    // eb213fff7ff8
    	LAAG	R4, R5, -524288(R6)   // eb54600080e8
    	LAAL	R7, R8, 8192(R9)      // eb87900002fa
    	LAALG	R10, R11, -8192(R12)  // ebbac000feea
    	LAN	R1, R2, (R3)          // eb21300000f4
    	LANG	R4, R5, (R6)          // eb54600000e4
    	LAX	R7, R8, (R9)          // eb87900000f7
    	LAXG	R10, R11, (R12)       // ebbac00000e7
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Wed Nov 22 03:55:32 GMT 2023
    - 21.6K bytes
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  2. src/cmd/asm/internal/asm/testdata/arm.s

    	MOVHU.P	-0x24(R9), R8        // MOVHU.P -36(R9), R8       // b48259e0
    	MOVH	-0x24(R9), R8        // MOVH -36(R9), R8          // f48259e1
    	MOVH.W	-0x24(R9), R8        // MOVH.W -36(R9), R8        // f48279e1
    	MOVH.P	-0x24(R9), R8        // MOVH.P -36(R9), R8        // f48259e0
    	MOVHS	-0x24(R9), R8        // MOVHS -36(R9), R8         // f48259e1
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Dec 15 20:51:01 GMT 2023
    - 69K bytes
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  3. src/cmd/asm/internal/asm/testdata/arm64error.s

    	VLD1.P	(R8)(R9.SXTX<<2), [V2.B16]                       // ERROR "invalid extended register"
    	VLD1.P	(R8)(R9<<2), [V2.B16]                            // ERROR "invalid extended register"
    	VST1.P	[V1.B16], (R8)(R9.UXTW)                          // ERROR "invalid extended register"
    	VST1.P	[V1.B16], (R8)(R9<<1)                            // ERROR "invalid extended register"
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Dec 08 03:28:17 GMT 2023
    - 37.8K bytes
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  4. src/cmd/asm/internal/asm/testdata/arm64.s

    	CASALW	R5, (RSP), R7                        // e7ffe588
    	CASALH	ZR, (R5), R8                         // a8fcff48
    	CASALB	R8, (R9), ZR                         // 3ffde808
    	CASPD	(R30, ZR), (RSP), (R8, R9)           // e87f3e48
    	CASPW	(R6, R7), (R8), (R4, R5)             // 047d2608
    	CASPD	(R2, R3), (R2), (R8, R9)             // 487c2248
    
    // RET
    	RET
    	RET	foo(SB)
    
    // B/BL/B.cond cases, and canonical names JMP, CALL.
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Dec 08 03:28:17 GMT 2023
    - 94.9K bytes
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  5. doc/asm.html

    The range of registers is specified by a start register and an end register.
    For example, <code>LMG</code> <code>(R9),</code> <code>R5,</code> <code>R7</code> would load
    <code>R5</code>, <code>R6</code> and <code>R7</code> with the 64-bit values at
    <code>0(R9)</code>, <code>8(R9)</code> and <code>16(R9)</code> respectively.
    </p>
    
    <p>
    Storage-and-storage instructions such as <code>MVC</code> and <code>XC</code> are written
    HTML
    - Registered: Tue May 07 11:14:38 GMT 2024
    - Last Modified: Tue Nov 28 19:15:27 GMT 2023
    - 36.3K bytes
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  6. src/cmd/asm/internal/asm/asm.go

    func (p *Parser) branch(addr *obj.Addr, target *obj.Prog) {
    	*addr = obj.Addr{
    		Type:  obj.TYPE_BRANCH,
    		Index: 0,
    	}
    	addr.Val = target
    }
    
    // asmInstruction assembles an instruction.
    // MOVW R9, (R10)
    func (p *Parser) asmInstruction(op obj.As, cond string, a []obj.Addr) {
    	// fmt.Printf("%s %+v\n", op, a)
    	prog := &obj.Prog{
    		Ctxt: p.ctxt,
    		Pos:  p.pos(),
    		As:   op,
    	}
    	switch len(a) {
    Go
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Wed Feb 21 14:34:57 GMT 2024
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