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Results 1 - 10 of 88 for simm (0.04 sec)

  1. src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/tables.go

    	// LDTRH <Wt>, [<Xn|SP>{, #<simm>}]
    	{0xffe00c00, 0x78400800, LDTRH, instArgs{arg_Wt, arg_Xns_mem_optional_imm9_1_signed}, nil},
    	// LDTRSB <Wt>, [<Xn|SP>{, #<simm>}]
    	{0xffe00c00, 0x38c00800, LDTRSB, instArgs{arg_Wt, arg_Xns_mem_optional_imm9_1_signed}, nil},
    	// LDTRSB <Xt>, [<Xn|SP>{, #<simm>}]
    	{0xffe00c00, 0x38800800, LDTRSB, instArgs{arg_Xt, arg_Xns_mem_optional_imm9_1_signed}, nil},
    	// LDTRSH <Wt>, [<Xn|SP>{, #<simm>}]
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Aug 16 17:57:48 UTC 2017
    - 211.8K bytes
    - Viewed (0)
  2. src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/inst.json

    {"Name":"LDR (immediate, SIMD&FP)","Bits":"11:2|1|1|1|1|0|0|01:2|0|imm9:9|0|1|Rn:5|Rt:5","Arch":"Post-index 64-bit variant","Syntax":"LDR <Dt>, [<Xn|SP>], #<simm>","Code":"","Alias":""},
    {"Name":"LDR (immediate, SIMD&FP)","Bits":"00:2|1|1|1|1|0|0|11:2|0|imm9:9|0|1|Rn:5|Rt:5","Arch":"Post-index 128-bit variant","Syntax":"LDR <Qt>, [<Xn|SP>], #<simm>","Code":"","Alias":""},
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Aug 16 17:57:48 UTC 2017
    - 234.7K bytes
    - Viewed (0)
  3. src/cmd/internal/obj/ppc64/asm9.go

    	return op | (d&31)<<21 | (a&31)<<16 | (sbit&1)<<15 | (simm&0xF)<<11
    }
    
    /* VA-form 3-register + SHB operands */
    func AOP_IRRR(op uint32, d uint32, a uint32, b uint32, simm uint32) uint32 {
    	return op | (d&31)<<21 | (a&31)<<16 | (b&31)<<11 | (simm&0xF)<<6
    }
    
    /* VX-form 1-register + SIM operands */
    func AOP_IR(op uint32, d uint32, simm uint32) uint32 {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 15 13:55:28 UTC 2024
    - 156.1K bytes
    - Viewed (0)
  4. src/cmd/asm/internal/asm/testdata/mips.s

    	//	}
    	SLL	R1, R2
    
    	//	LSHW imm ',' sreg ',' rreg
    	//	{
    	//		outcode(int($1), &$2, int($4), &$6);
    	//	}
    	SLL	$4, R1, R2
    
    	//	LSHW imm ',' rreg
    	//	{
    	//		outcode(int($1), &$2, 0, &$4);
    	//	}
    	SLL	$4, R1
    
    	//
    	// move immediate: macro for lui+or, addi, addis, and other combinations
    	//
    	//	LMOVW imm ',' rreg
    	//	{
    	//		outcode(int($1), &$2, 0, &$4);
    	//	}
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Aug 08 12:17:12 UTC 2023
    - 6.7K bytes
    - Viewed (0)
  5. src/cmd/internal/obj/arm64/doc.go

    32-bit variant ldr => MOVWU;
    ldrb => MOVBU; ldrh => MOVHU;
    ldrsb, sturb, strb => MOVB;
    ldrsh, sturh, strh =>  MOVH.
    
    4. Go moves conditions into opcode suffix, like BLT.
    
    5. Go adds a V prefix for most floating-point and SIMD instructions, except cryptographic extension
    instructions and floating-point(scalar) instructions.
    
    Examples:
    
    	VADD V5.H8, V18.H8, V9.H8         <=>      add v9.8h, v18.8h, v5.8h
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Aug 07 00:21:42 UTC 2023
    - 9.6K bytes
    - Viewed (0)
  6. src/cmd/vendor/golang.org/x/arch/x86/x86asm/inst.go

    type Rel int32
    
    func (Rel) isArg() {}
    
    func (r Rel) String() string {
    	return fmt.Sprintf(".%+d", r)
    }
    
    // An Imm is an integer constant.
    type Imm int64
    
    func (Imm) isArg() {}
    
    func (i Imm) String() string {
    	return fmt.Sprintf("%#x", int64(i))
    }
    
    func (i Inst) String() string {
    	var buf bytes.Buffer
    	for _, p := range i.Prefix {
    		if p == 0 {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:33 UTC 2023
    - 10.6K bytes
    - Viewed (0)
  7. test/typeparam/aliasimp.dir/main.go

    // type S = R // disallowed for now
    
    type Sint = R[int]
    
    // type Simp = a.Rimp // disallowed for now
    
    // type SimpString Simp[string] // disallowed for now
    type SimpString a.Rimp[string]
    
    func main() {
    	// var s S[int] // disallowed for now
    	var s R[int]
    	if s.F != 0 {
    		panic(s.F)
    	}
    	var s2 Sint
    	if s2.F != 0 {
    		panic(s2.F)
    	}
    	// var s3 Simp[string] // disallowed for now
    	var s3 a.Rimp[string]
    	if s3.F != "" {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Mar 24 02:14:15 UTC 2022
    - 709 bytes
    - Viewed (0)
  8. src/cmd/internal/obj/riscv/obj.go

    	// Bit order - [11|4|9:8|10|6|7|3:1|5]
    	bits := extractBitAndShift(imm, 11, 10)
    	bits |= extractBitAndShift(imm, 4, 9)
    	bits |= extractBitAndShift(imm, 9, 8)
    	bits |= extractBitAndShift(imm, 8, 7)
    	bits |= extractBitAndShift(imm, 10, 6)
    	bits |= extractBitAndShift(imm, 6, 5)
    	bits |= extractBitAndShift(imm, 7, 4)
    	bits |= extractBitAndShift(imm, 3, 3)
    	bits |= extractBitAndShift(imm, 2, 2)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sun Apr 07 03:32:27 UTC 2024
    - 77K bytes
    - Viewed (0)
  9. src/cmd/covdata/subtractintersect.go

    		pkeys = append(pkeys, k)
    	}
    	// Remove anything from pmm not found in imm. We don't need to
    	// go the other way (removing things from imm not found in pmm)
    	// since we don't add anything to imm if there is no pmm entry.
    	for _, k := range pkeys {
    		if _, found := s.imm[k]; !found {
    			delete(s.mm.pod.pmm, k)
    		}
    	}
    	s.imm = nil
    }
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Oct 12 12:50:46 UTC 2022
    - 5.5K bytes
    - Viewed (0)
  10. src/crypto/internal/edwards25519/field/_asm/fe_amd64_asm.go

    	Comment("Second reduction chain (carryPropagate)")
    	// c0 = r0 >> 51
    	MOVQ(r0lo, c0)
    	SHRQ(Imm(51), c0)
    	// c1 = r1 >> 51
    	MOVQ(r1lo, c1)
    	SHRQ(Imm(51), c1)
    	// c2 = r2 >> 51
    	MOVQ(r2lo, c2)
    	SHRQ(Imm(51), c2)
    	// c3 = r3 >> 51
    	MOVQ(r3lo, c3)
    	SHRQ(Imm(51), c3)
    	// c4 = r4 >> 51
    	MOVQ(r4lo, c4)
    	SHRQ(Imm(51), c4)
    	maskAndAdd(r0lo, maskLow51Bits, c4, 19)
    	maskAndAdd(r1lo, maskLow51Bits, c0, 1)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 7.2K bytes
    - Viewed (0)
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